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Auto-Interactive delay tune, not working in Allegro 16.6 007

Kabal

 Hello, I am attaching a picture snapshot of constraints I created for two pinpairs. One pinpair is longer than another, I want Auto-interactive delay tune to make shorter pinpair (DIN2)  has the same length as a longer pinpair (DIN1).

 After matched group constraint is created, analyzed and reports the mismatch in length in %, I go back to PCB Editor, select Route->Auto-Interactive Delay Tune, then click on the shortest pinpair, but nothing happens, it does not get increased in length.

 And in the console I read:

Clines Selected: 1; Timing constraints: 1; Timing violations: 1; Outside ideal range: 1

 What am I doing wrong?

 

I tried with the latest release, same thing! It just does not work! 

 I also tried on another pair of signals, located near each other and with tons of space around, still does not work!!

 I even tried to increase tolerance, it simply does nothing!

Does this feature even work normally in this software, or it only works in online demonstration clips?

Or what conditions have to be met to make it work?

  • aCraig

    Try moving your cursor to define where the delay tunning should be. It's Auto-interactive not automatic.

    Craig

  • Kabal

     well, in all movie clips about that feature, they just select signals and it just works right away, its not like they try so hard to get it done.

    However, I tried different combinations and I tried moving my cursor almost anywhere, then I decided to try same on another lines, even on another project, and it simply does not work.

    again, I even tried increasing tolerance, I tried it also in an empty space, where there are only two lines with lots of space around (so that it would be really easy do it manually), but AiDt just does not work.

     

    that is why I am wondering maybe I am missing something? What else has to be done? Maybe some another option checked?

    (I already have everything ON for electrical Modes in my constraint modes)

    what else?

  • Kabal

     I tried all possible combinations, as well as, combination in which there are only two traces with lots of space around and no obstacles (so that one could do it easily manually as well), and that function simply does not work.

    Maybe I am missing something? I simply create a match pair, define pin pair column as a Longest Pin Pair,  analyze it, then go back to PCB Editor, and select aiDt on the short wire, and nothing happens.

    what else could I be missing?

  • brettcad

    Hi Kabal,

    There are some routing situations that will limit AiDT from adding tuning bumps onto selected clines.  (attached list)
    You may also want to check File->Viewlog after the AiDT command has been run.  It can sometimes indicate problems encountered during the command run.

    Limitations 1.      Diff Pair Phase:  AiDT will not change the phase imbalance for a diff pair.  It is recommended to get diff pairs into phase before running AiDT.2.      Odd-angle routing:  AiDT will not add tuning patterns onto odd-angle cline segments.  AiDT will also not push/shove any odd-angle cline segments during processing.3.      Arcs:  AiDT will not add tuning patterns onto arc cline segments.  AiDT will also not push/shove any arc cline segments during processing.4.      Wide routing:  AiDT will not add tuning patterns onto cline segments that are routed wider than Min Line Width.  AiDT will also not push/shove any cline segments during processing that are routed wider than Min Line Width.5.      Shortening:  AiDT will not attempt to shorten signals to meet timing constraints.  For Relative Propagation Delay constraints, all signals in the matchgroup will be increased to be within range of the longest signal.6.      Dangling Clines: AiDT will not add tuning patterns to dangling clines.  The cline selected must be part of a connected rat (pin-pair) on the net.

         

    Regards,

    Brett

  • Kabal

     Ok. someone helped me out with that problem.

    Problem was that in the Physical Constraints Set they were defined as 5mil Width traces, But in general I needed 12mil traces, right when I corrected those sets to 12mil width, the AiDT worked fine. thats it.

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