Stats

  • Locked Locked
  • Replies 7
  • Subscribers 166
  • Views 4088
  • Members are here 0
More Content
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

In-Line voids for specific diff pair vias/TH pins

Mstrghettorigg

Hi All,

I'm getting some designs that they are requesting to have clean voids around vias/TH pins for certain diff pairs.

I see that in global dynamic shape parameter under void controls tab there is a way to create in-line voids. 

I would like to have similar voids, but to only specific vias/TH instead of entire board.  (Cuts out too much PWR/GND planes)

Has anyone come up with easy solution for this?

I've created via with specific anti etch, but the orientation of the vias needs to be adjusted and I would like to make it pretty fool proof.

Please let me know if anyone has any suggestions.

  • steve
    One possible solution is to set the shapes to use in-line voids but only of a certain via-via distance then make your diff pair via spacing closer than you normally would and the shape will only in-line void the diff pair vias.
  • Mstrghettorigg

    Hi Steve,

    Thanks for idea. I will have to see if this is something that will be simple enough for everyone to use easily without changing too much of our default constraints.

    I wonder if any Skills are available for something like this?

  • redwire
    Several ways. Build the voids into the symbol under the needed pins and then it moves with the pins as defined. For via pairs you can always place a symbol that has a defined padstack with voids in it. This means including it in the netlist/schematic. Last way is to define a route keepout shape and place it relative to the origin of one of the vias and then move it with the via pair (slow and error wrought)
  • Mstrghettorigg

    Hi Redwire,

    Thank you for additional options.  

    Unfortunately I don't know if I would be able to have our symbol in our global library to have these specific in-line voids since only specific group of engineers likes to use them.

    As for the vias, I did create a library, but only problem I faced was the the rotation of the vias caused issues where if vias were placed vertically vs horizontally it would leave incorrect void based on the pad.  I know we could probably just make separate via pad for vertical/horizontal, but I think we are looking something that has less chance of user error which you mentioned on the last option.

    I was hoping for something very simple and user friendly like assigning property to vias and it would assign the "In-line Void" no matter the orientation of vias.  Or SKILL file that could do something like this.

    I understand that everything is based on the designer making sure everything is done right, but it would be ideal if we can make it fool proof as possible for multiple users.

    Thank you guys for your inputs.  Please keep them coming if you have other ideas!

  • redwire

    Ok, the only foolproof method is to build in the voids into the symbol.  Not sure why some engineers don't understand the use. I have some whitepapers on the science behind this as do lots of other engineers.

Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.