Stats

  • Locked Locked
  • Replies 2
  • Subscribers 166
  • Views 13139
  • Members are here 0
More Content
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

DRC not flagging line to hole clearance violation

Allan M

Hello Cadence Community,

I have a weird problem.  I have a board with two mechanical symbols, each with an unplated mechanical pin padstack.  If I route a line through one hole, I get a DRC error while if I route the line through the other hole, I do not get a DRC error.  This is very strange.  I cannot find out what the difference is between these two holes.  Perhaps someone can look at my board to see what the problem is.  Many thanks in advance.

I am using OrCAD PCB Designer, 16.6.

Cheers,

Allan

p.s.  How the heck do you attach a file?  I'd like to post a zip file of the project.  I will try posting "media" so here goes!

clearance_bug.zip

  • techk
    On smallhole, edit the pad and turn off "Mech pins use antipads as Route Keepout" .
  • Allan M
    Thanks Dan! I knew it was something subtle! The funny thing about that solution is that I do not have any anti-pad defined for that padstack. You would think the software would ignore the option unless there was actually an anti-pad defined. Cheers, Allan
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.