Orcad netlist error caused by duplicated pin name

Most duplicates are Power and Ground pins so if you set the Pin Type correctly to be Power and you won't see this error. For NC pins instead of adding them to the symbol add them as a property name NC value a comma separated list of the NC pins 1,6,9,10 etc. The rest you will need to fix. There is a command under Accessories - Library Correction Utility that will fix the libraries and add a #pin number to each pin name if you don't want to do it yourself.

Hi, tried that utility but no luck, it said no duplicated pin part was found. It seems bug s on this utility.

this is really undesirable and bad. If I do for example USB Jack symbol with two pin names named "D+" but different pin numbers, why would CAD tool prohibit me from doing this?

Developers should fix this ASAP. Duplicated Pin *NAMES* should be allowed, I am ok with no duplicate pin *NUMBERS* being allowed, but what's wrong with having same pin names? I need duplicated pin names with "Passive" property!

There is a lot of fancy tricks like duplicating pins and adding various properties to the schematic symbols.
I have however experienced problems with approaches like this. Sooner or later, there will be
mistakes made in the mapping between schematic symbols and footprints shared by other symbols.

OrCAD Capture is not always very detailed when a net list generation has failed.

So in order to avoid possible mistakes, I never hide pins. I always make schematic symbols
with == number of pins compared to the footprint. Typical examples are TO220 (tab and one the pins
share the same net). NC-pins are designated NC1, NC2, NC3, etc. Large BGA's wit a lot of NC-pins
are created as fractured symbols with NC-blocks.

I create schematic symbols like diodes with pins "A" and "C" and map them to corresponding
footprints with pins named like that.

I even create fiducials and mounting holes
as schematic symbols. Then place them on the last page.

It is a primitive approach and it does not look nice. I agree on that, but: If these things are visible in the schematic and that schematic is subject
to a thorough review before going to layout, the risk is minimized that things are forgotten and there is no need
for detailed check-lists.

My 5 cents.