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  3. Properties attached to drc error RAVEL_MARKER_DESCRIPTION...

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Properties attached to drc error RAVEL_MARKER_DESCRIPTION = Soldermask and Board Outline Minimum S pacing on Bottom Layer EXTERNAL_DRC_VALUE = 75.0

TiBo
TiBo over 9 years ago

Hi,

I have this annoy DRC about soldermask spacing. Could anyone help? I just want to get risk of these. Thanks

LISTING: 1 element(s)

           < DRC ERROR >

  Class:           DRC ERROR CLASS
  Subclass:        ALL
  Origin xy:       (2320.029 12.700)
  Constraint:      Externally Determined Violation
  Constraint Set:  Soldermask and Board Outline Minimum Spacing on Bottom Layer
  Constraint Type: EXTERNAL REFERENCE

  Constraint value: 75.0
  Actual value:     71.0

  Properties attached to drc error
    RAVEL_MARKER_DESCRIPTION  = Soldermask and Board Outline Minimum S
                                pacing on Bottom Layer
    EXTERNAL_DRC_VALUE  = 75.0

  - - - - - - - - - - - - - - - - - - - -
  Element type:    SYMBOL PIN
  Class:           PIN
  location-xy:  (2256.029 12.700) 
  - - - - - - - - - - - - - - - - - - - -
  Element type:    SHAPE
  Class:           BOARD GEOMETRY
  Subclass:        OUTLINE

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  • oldmouldy
    oldmouldy over 9 years ago

    Tools>Database Check, or Check>Database Check for 2015 OrCAD PCB Editor, click the button for Remove external DRCs

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  • TiBo
    TiBo over 9 years ago

    Thank Oldmouldy, 

    Yes, it works. 

    Regards,

    TiBO

    I contacted Cadence and here is their response. Just want to share.

    I checked on your DRC part. It is basically NEW RAVEL DFM DRC RULE that has been setup between solder mask and board outline for minimum spacing. The Allegro 16.6-2015 release now has an option to include a list of limited DFM checks that take advantage of the Cadence RAVEL capabilities. The Relational Rules Starter kit requires the license: MSW43U: Cadence® Relational DRC PCB User

     

    - To trace the DRC, launch Constraint Manager and go to DRC spreadsheet and last item is "External".

    - Search for Solder mask to board outline spacing DRC - right click and choose "select and show element" - this will take you to the layout where you see DRC

     

    For more information on RAVEL rule check, please use following links.

     

    Allegro Relational Rules Checker Starter Kit http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:TechPubDocs;src=pubs;q=/spbPN/spbPN16.6-2015/readme_product_noteQIR009.html

     

    Allegro Relational Rule Developer: Ravel Tutorial http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:TechPubDocs;src=pubs;q=ravel_tut/ravel_tut2.26/ravel_tutTOC.html

     

    Allegro Relational Rules Checker : How to Run DFM RAVEL Rules through GUI ( Video )

    http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:VideoViewer;src=wp;q=Video/Silicon-Package-Board_Co-Design/vdn/AllegroRRC_RunRAVEL_GUI.html   (in case if you are unable to stream on chrome, use internet explorer to stream this video

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