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Issue with duplicated Pspice model -Full version of Cadence 16.5

Hi ! We are trying to implement a full bridge inverter with two NCP5181 as showed in the figure. When we copy this half bridge model with the same inputs, eveything works well. When we are trying to invert the two logicals inputs (DSTM1 and DSTM2) on the second half bridge, we have 0V at the output of both circuits. Any thoughts ?

Thank!

oldmouldy over 9 years ago

You need to post this in the PCB Design forum since this is not related to custom IC design... In any case, draw the entire circuit that you have the issue with, open the Project Manager tab, select the DSN file entry and File>Archive Project, create a single archive ZIP, including any custom libraries and post the archive to the forum. Then the "real" circuit can be evaluated, rather than just a picture.
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Andrew Beckett over 9 years ago

I moved the thread to the PCB Design forum.
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tltoth over 9 years ago

Relating to the: Issue with duplicated Pspice model -Full version of Cadence 16.5

The problem is that you just duplicated the original circuit leaving the net names (net alias) unchanged.

The "Boot, DRV_HI, Brdg, DRV_LO" nets are common to both circuit. So both drivers drive both bridges.
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