Stats

Locked Locked
Replies 3
Subscribers 166
Views 12574
Members are here 0

Non plated holes error is not showing in cadence PCB design

Hi all,

In my design two non plated holes are there. two different traces are passing through the non plated holes in inner layers, but not showing error.

please find attached snap short,

any one help me.

Thanks,
Balaji

steve over 9 years ago

Go To Setup - Constraint Modes - Spacing Modes and make sure that the Hole to checks are enabled. They are not by default because normally most holes are surrounded by a pad of some description.
Cancel
Vote Up 0 Vote Down

Cancel
Balaji jogi over 9 years ago

Hi steve thanks for your suggestion. already i have enabled spacing DRC modes. but no pad in inner layer padstacks , actually no need of pads because that is only non plated holes. please suggest me.
Cancel
Vote Up 0 Vote Down

Cancel
steve over 9 years ago

That was the suggestion!! Make sure that they are all enabled (You need to see Ticks in all boxes. If you see a square they are not all enabled so click on the + signs and make sure they are all enabled.
Cancel
Vote Up 0 Vote Down

Cancel

Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.