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parallel routing setting in constraints manager.

tmd63

I have 2 signals that I need to route with the same length of trace from end to end.

Which is the best settings in CM to ensure the switching is performed at the same time (ie the same length of trace). I am not after any impedance matching, just a simple timing arrival similarity (length of trace).

Just to clarify, the signals have to arrive from source to destination at the same time interval, but they are not differential signals and are not impedance matched (Not USB or CAN Bus types). They are just a simple gate control signal, but they drive High/Low FET's and must not overlap on their switching (The drive IC ensure this, but the timing must remain at the other end of a long trace to within a few nS).

The timing delay could be 10-250 nS along the length, but the difference must be +/-2 nS or less.

  • steve
    Try creating a matched group (Relative Propagation Delay). More details here orcad.co.uk/.../Match_groups.pdf
  • Fitzdean

    I agree with using the relative propagation delay constraint.  Be careful of using just length matching.  If both signals are the same length on the same layers, then you will be ok.  But if they are on different layers, then you will also need to take into account the propagation delay differences between layers depending on your stackup.

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