Jumper & Single Side PCB's

Look under your start menu for Cadence Help. In here if you type jumpers there is a guide that is part of the allegro Library Development PDF algrolibdev that has a section on how to create a jumper

These are steps that I came up with that will work using any size zero ohm SMD resistor and wire jumpers combined.  Note when you design is finished your schematic will match your board as well. Plus you will have a BOM containing jumpers too. Pre-requisite- You will need to build package symbols for you various thu hole jumper lengths. Your schematic library must contain wire jumper symbols plus, zero ohm SMD resistors various size ratings R0805, R1206 etc

1. layout your board as if it was double sided. But route all your traces and the bottom side except to hop over another trace or traces. Just drop a via and route a small straight path on top side. The trace length should be as long as your planned jumper. Drop another via to return to the bottom side to finished the route. You can also drop a temporary jumper part over the top route to check clearances and to note what jumper you will add to the schematic later. The jumpers can be a wire or SMD part. 

2. Once your board is finished you need to update your schematic. Note. Make sure all your schematic changes are in and board is up to date before doing the following.- Add into the nets in series either jumper or SMD resistors matching the layout. To maintain a user assigned net name like "GND" between each jumper you will need to follows- Rename each segment between the jumpers similar like GND, GND(A), GND(B) etc. By doing this you will be able to search/high-lite by net name. Type GND* to see the whole GND net etc.

3. Generate a netlst.

4. Import into your layout. Do not check "Allow etch removal removal during ECO". This will help you to identify what jumpers go where. This process is a little confusing at first because the etch segments will take on new net names because of the jumpers and show errors. To correct this. In your select filter turn on CLine segs and Vias. In general edit mode detached each route ends one at a time. Place your jumper and reattached to the existing dangling route by routing to it. The route will take on the new net name and the errors will go away. The attached is a typical single sided design that I did a while back. It took longer to layout than to update it with jumpers. That process will take maybe a couple of hours to do. But, its well worth it. I have done this many times in OrCAD and other tools as well. Same process basically. Please note the micro and the net names for the GND nets. It shows the multi GND names as mentioned above.

Cheers, Good luck.   

These are steps that I came up with using  zero ohm SMD resistors and wire jumpers combined. This is not the OrCAD process.  Note- when your design is finished your schematic will match your board as well. Plus you will have a BOM containing all the jumpers too. Pre-requisite- You will need to build package symbols for you various thu hole jumper lengths. Your schematic library must contain wire jumper symbols plus, zero ohm SMD resistors various size ratings R0805, R1206 etc

1. layout your board as if it was double sided. But route all your traces on the bottom side except to hop over another trace or traces. Just drop a via and route a small straight path on top side. The trace length should be as long as your planned jumper. Drop another via to return to the bottom side to finish the route. You can also drop a temporary jumper part over the top route to check clearances and to note what jumper you will add to the schematic later. The jumpers can be a wire or SMD part. The wire jumper on top while all SMDS on the bottom. 

2. Once your board is finished you need to update your schematic. Note. Make sure all your schematic changes are in and board is up to date before doing the following.- Add into the nets in series either jumper or SMD resistors matching the layout. To maintain a user assigned net name like "GND" between each jumper you will need to do the follows- Rename each segment between the jumpers similar like GND, GND(A), GND(B) etc. By doing this you will be able to search/high-lite by net name. Type GND* to see the whole GND net etc.

3. Generate a netlst.

4. Import into your layout. Do not check "Allow etch removal removal during ECO". This will help you to identify what jumpers go where. This process is a little confusing at first because the etch segments will take on new net names because of the jumpers and show errors. To correct this. In general edit mode, select filter turn on CLine segs and Vias. Detached each route ends one at a time. Delete the vias and top side route too. Place your jumper and reattached to the existing dangling route by routing to it. The route will take on the new net name and the errors will go away.

5. Completed design -MFG output. Generate only files of the bottom side of the board as well as any layers you think you need. The drill chart and the NC files may state PLATED holes. That needs to be addressed by changing the pads on fly to non-plated. However, the latest version of OrCAD have removed the ability to do this easily. BUG here, Cadence is addressing. So just add a note to your fab drawing stating non-plated for all hole for the supplier.

The attached is a typical single sided design that I did a while back. It took longer to layout than to update it with jumpers. That process will take maybe a couple of hours to do. But, its well worth it. I have done this many times in OrCAD. Please note the micro and the net names for the GND nets. It shows the multi GND names as mentioned above. There are SMD jumpers on this design too. The SMD resistors us R for the REF designations because they are just resistors. The wire jumpers can be what ever you like.

Cheers, Good luck.