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  3. adding vias to a part (symbol)

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adding vias to a part (symbol)

CSCNalu
CSCNalu over 7 years ago

Hi

I'm new to OrCAD and have only done one design so far but I'm trying to figure out how to stick vias into a thermal pad.  I have a QFN design from a friend and I can't tell if he did it as well but I've seen the board it created and he's got tented vias in the thermal pad and I can see from the design files that he's got the solder mask in a pattern and paste mask in a pattern so there's a clear place where the vias go but I don't see them on the package when I open it for edit.  Is there a way to do this or is it done when you're creating the board or was it somehow included into the package pin but I'm not seeing it when I open up the padstack editor?

Thanks

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  • redwire
    redwire over 7 years ago

    You can add the vias at the package level by using "add connect" in the menu.   You will need a padstack for the large thermal pad and then you can add as vias as you desire to it.  Be sure to add the padstack under the part as a pin in the component so that it shows up in the schematic.  You are allowed to add shapes and vias under a part and connect them free-hand to any net if you want to but it usually is more cumbersome and results in missed connections in the final product.  Ask more questions if you are still having trouble getting this right.

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  • CSCNalu
    CSCNalu over 7 years ago in reply to redwire

    Thanks redwire - one other question; there seems to bee an auto keepout that's preventing me from putting it in the pad; is there a layer within the padstack I need to delete?  Or somehow assign the net of the pin (in this case pin 101? since it's a QFN-100 and it's the 101-st pin) to let it go?  Sorry - still new to this so I'm not sure how to manually override a keepout or turn off/accept the DRC errors

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  • CSCNalu
    CSCNalu over 7 years ago in reply to redwire

    Thanks redwire - one other question; there seems to bee an auto keepout that's preventing me from putting it in the pad; is there a layer within the padstack I need to delete?  Or somehow assign the net of the pin (in this case pin 101? since it's a QFN-100 and it's the 101-st pin) to let it go?  Sorry - still new to this so I'm not sure how to manually override a keepout or turn off/accept the DRC errors

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  • redwire
    redwire over 7 years ago in reply to CSCNalu

    I am assuming you have added the desired via to the constraint manager physical tab so it can be used?  When adding the connection you need to make sure the find filter has pins, shapes, and whatever else you want to detect on checked.  You should be able to route from any arbitrary object and drop a via.  If you are getting DRCs that's normal (another topic tho...).  If you are getting some other DRC that is preventing the via to touch the pin then drop it and move it with "allow DRC" and hug/shove turned off.  

    If still stuck you can either post up the symbol here or PM it for a look.  Or even a screen shot of what's happening.

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