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  3. Running SigXplorer in Batch Mode

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Running SigXplorer in Batch Mode

archive
archive over 19 years ago

I'm looking for information (links, documents, advices, etc.) on how to run a SigXplorer design in batch mode.

While it's easy to find in the tool's course book the tlsim batch mode documentation (Appendix A), I'm still missing a full flow - for example how to obtain from the SigXplorer design (.top file) the spice files (main/stimulus/comps/interconn.spc) and other required inputs for the tlsim run.

Thanks,
Marcelo.


Originally posted in cdnusers.org by marcelor
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  • archive
    archive over 19 years ago

    Hi Marcelo,

    I've spent a lot of time working with the SPICE files underneath the GUI.  It is powerful, once you get the hang of it.  Some ideas for you:

    1) Type "tlsim" at a command prompt for a dump of the usage options
    2) There is a switch to run SigXp on a .top without running up the GUI, I think it is -nograph.
    3) All the .spc files are produced, and then called from main.spc.  You only have to tell tlsim where to find main.spc.
    4) There was a nice appnote on allegrosi.com written by Patrick Riffault on how to batch SigXp .top files, but I can't seem to find it at the new site.  Anyone know where it went?

    Hope that helps,
    Donald


    Originally posted in cdnusers.org by Donald Telian
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    archive over 19 years ago

    Hi Donald,

    Thanks for your reply.
    I successfully "played" a bit yesterday with tlsim.
    What I'm missing is something like you mentioned in item #4, a flow to get all the required inputs for tlsim from my design (from .top file to .spc files and any other required input).
    I believe it should be part of what happens when selecting "Analyze>Simulate" in SigXplorer (Skill function run?), but I need to find some documentation about it...

    Regards,
    Marcelo.


    Originally posted in cdnusers.org by marcelor
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    archive over 19 years ago

    The revised application note can be found at: http://www.cdnusers.org/Articles/Download/tabid/163/Default.aspx?title=SigXplorer%20Batch%20Mode%20Simulations


    Originally posted in cdnusers.org by lwang
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    archive over 19 years ago

    Thanks !


    Originally posted in cdnusers.org by marcelor
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    archive over 19 years ago

    I ran a .top simulation case that generated the *.spc in
    sigxp.run\case0\sim1
    For example, I obtained an interconnect.spc as follow:

    .subckt DESIGN_icn_ckt 1 2
    * Display all elements first
    NTLidlPart_21 (1 0) (2 0)
    +L=0.0254 rlgc_name=STL_1S_1R_5 file=./ntl_rlgc.inc

    .ends DESIGN_icn_ckt


    Later, I went to the command prompte, and input:
    spc2spc interconn.spc
    I obtained the following spice file, main_gen.spc:

    .subckt DESIGN_icn_ckt 1 2


    XTLidlPart_21 1 2 0 rlgc_sub1


    .subckt rlgc_sub1 1 2 9999
    X1_1a 1 100 9999 rlgc_sub1a
    X2_1a 100 101 9999 rlgc_sub1a
    X3_1a 101 2 9999 rlgc_sub1a


    .ends rlgc_sub1

    .subckt rlgc_sub1a 11 12 999
    C1_1a 12 999 5.3456e-013
    L1_1a 11 13 4.40665e-009
    R1_1a 13 12 0.0611742


    .ends rlgc_sub1a

    .ends DESIGN_icn_ckt


    .end

    Hope this is helpful.


    Originally posted in cdnusers.org by elie
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