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Should I worry about die signal overshoot?

I have a SigXplorer simulation showing overshoot at the die level for a mobile DDR (1.8V) device driven by a fairly new ARM11 device that violates the overshoot specification fr the memory. However, the package pin shows no specific overshoot problem. The trace length is less than 1/2 inch and the speed is 133MHz. The trace is controlled impedance. According to the memory vendor, they say their specification is for the waveform at the package pin. But according to the CPU vendor and a high speed design consultant, they say that the signal performance at the die is also important.

So, who do I believe?

The simulation only fails the overshoot specification when the Simulation Modes is set to FTS Mode: Fast. Typical and slow are fine. Attached is the printout from the simulation. Feel free
to email me if you have a definitive answer. Thanks in advance.

Originally posted in cdnusers.org by fitzdean

fast_plot.pdf

archive over 19 years ago

One thing to keep in mind is that the fast case is VccTypical+10%. If you take the magnitude of the overshoot and subtract from it the fast case Vcc and then add the typical case Vcc, do you still exceed the spec? What kind of package model do you have on this device?

Originally posted in cdnusers.org by Kalevi2
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archive over 19 years ago

Signal performance at the die is the important thing since that is what the silicon sees. Since we cannot use a scope probe to access the die, timing numbers are referenced to the pin except rarely when you are provided detailed package delays.

Originally posted in cdnusers.org by Kalevi2
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archive over 19 years ago

Yes, the simulation still would show violation if I subtracted off the 10% high on the VCC.

Originally posted in cdnusers.org by fitzdean
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archive over 19 years ago

What kind of package model do you have?

Originally posted in cdnusers.org by Kalevi2
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archive over 19 years ago

137 pin FBGA, 0.8mm pitch, stacked DDR/NAND, not sharing data bus.

Originally posted in cdnusers.org by fitzdean
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