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  3. Changing Line Width of a Trace in a Net without DRC Err...

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Changing Line Width of a Trace in a Net without DRC Errors

TC2019
TC2019 over 5 years ago

Hi,

I would like to know a way to change the line width of a trace within a larger net without DRC errors.

I have a net with 100mil line width assigned to it. There are several traces branching off from this main 100mil line that I want only 8mil thick (e.g. pull-up resistors/decoupling caps). When I manually change the line width for these traces (and they are long traces), I get millions of L><W error markers on them. Is there a proper way to do this in OrCAD PCB Designer Standard 17.2 version (and I am new to it).

Any help would be greatly appreciated. Thanks.

TC

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  • redwire
    redwire over 5 years ago

    neck_rules.zip

    Here's an example of a net routed with the 8 mil neck rules but the basic line width is 100 mils

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  • TC2019
    TC2019 over 5 years ago in reply to redwire

    Hi Redwire,

    Thanks for the demo files. That works for me.

    What I notice is that a trace has to contain at least a segment of 100mils. Otherwise, I have the same errors. I guess they stay true to the meaning of a necked trace.

    In your file, if I delete the last trace segments to R1 and R2, this turns into a connection between these two. If I use Neck Mode to route this connection end to end, this 8mils trace has these same errors. In my design, these are long winding traces. Following the same concept, I have to find a spot for each trace to drop a 100mils segments somehow. It's going to look like pythons after having big meals.

    It would be great to have a clean way of doing this, just 8mils traces. If not, I guess I just waive these errors and done with?.

    TC

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  • redwire
    redwire over 5 years ago in reply to TC2019

    Neck rules will very much depend on what is touching the necked cline.  In my example I set an arbitrary neck length that might not work for all cases.  If you could alter my example and post it back with what issues you're running into I think we can figure out the right rules that don't require waiving.

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  • redwire
    redwire over 5 years ago in reply to TC2019

    Neck rules will very much depend on what is touching the necked cline.  In my example I set an arbitrary neck length that might not work for all cases.  If you could alter my example and post it back with what issues you're running into I think we can figure out the right rules that don't require waiving.

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  • TC2019
    TC2019 over 5 years ago in reply to redwire

    Hi Redwire,

    I have been fooling around with your file by deleting routes, moving the Rs around, re-routing them in Neck Mode end to end and partial, routing back on the main trace and branch off and so on. I think the solution is the value set for Neck Max Length as you suggested. It was a bit confusing at first because the errors remained even though it was changed from 500mil to 5000mils in the constraints manager. I had to touch the trace to clear them. I guess it does not clear the errors automatically after each change.

    I will use this Neck Max Length setting to finish what I was working on. I still have some other errors like pad to trace at the ICs to figure out. I think they relate to this somehow. Maybe I have to touch those traces to clear those errors. If I need help for that, I will continue with this tread instead of creating a new one so info does not get repeated.

    In all, I thank you and Excellon1 for the help.

    TC

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  • excellon1
    excellon1 over 5 years ago in reply to TC2019

    Hi TC. Another approach to all of this would be one of an electronic approach. Since you have a main bus line that is feeding down stream logic, I propose splitting the net.

    To feed the logic off the main branch you could use a small ferrite  bead or a zero ohm jumper-Resistor. This would resolve those net issues for you.

    It may help with EMI in the case of the ferrite or the zero ohm jumper-resistors can act as a fuse if one of the downstream logic should fail. We routinely do this for all power distribution to down stream regs and it works pretty good.

    Maybe an idea to consider.

    All the best.

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  • redwire
    redwire over 5 years ago in reply to TC2019

    You will need to force an update to the DRC checker any time you change constraints on existing routing or placement.  When you rip up and re-route the dynamic checker (which needs to be on) will re-run as soon as you route.  There is an icon typically at the top of the screen that is the DRC check button and the command is buried in one of the menus as well.

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  • TC2019
    TC2019 over 5 years ago in reply to excellon1

    Hi Excellon1,

    What you said is a very good practice. In this design, I have a few BLMxx ferrite beads for EMI and net separation. I also use nano PTC fuses for protection. It's similar idea but was not really intended for the routing purpose (didn't see these errors coming).

    Over the last few days, I moved things around a bit and used many copper polygons to enclose those high-current nets. The Neck Mode routing together with longer neck length as you suggested did the job. The board is now fully routed without error. I need to learn how to post process it as my next task. I am pretty sure I will need help on this.

    Thanks for your help again.

    TC

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  • TC2019
    TC2019 over 5 years ago in reply to redwire

    Hi Redwire,

    I see DRC Update icon on the top left, not sure if it is the same one you talked about. Unfortunately, every time I click on it, the software simply closes/crashes. I am not so sure what it is causing it. It also does the same when I click on Update DRC button in the window after Check - Design Status.

    I am new to this OrCAD PCB, still learning but so far I cannot really say it is the most user friendly or efficient software. It sure needs a lot of mouse clicking, too many really for a single task. It seems like I have clicked over a few millions Oops and Done doing this board.

    TC

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