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Regarding making of library in allegro_design_entry_HDL?

VijayKK

In allegro_design_entry_HDL  as libraries i am getting and that i have created using Padstack editor  is of format .jrl, .psm, .tag, .log, .dra, .psm, .dra.lck. But in Allegro_design_entry_HDL the libraries are divided in three folders. Chips , entity, sym_1

Inside chip it is .prt and .tag

Inside entity it is .tag, .db, .v, .vhd, .vlog004u.sir

inside Sym_1  it is .tag, .css, .lck

So i am not getting how the library for allegro_design_entry_HDL is created.?Please help me out?

  • VijayKK

    The libraries i have created using padstack_editor and Allegro PCB Designer is

  • VijayKK
    in reply to VijayKK

    And the libraries found in  allegro_design_entry_HDL

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