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Question of soldermask spacing constraint set

LiamZh

Hello everyone,

Lately I have met some troubles while trying the soldermask design rules check function of Allegro 16.6

When I check the "soldermask to pad and cline" rule, it will report  DRC errors when  vias are on  "package soldermask".

When it comes to the "soldermask to shape" rule, it will report DRC errors when shapes and "package soldermask" are too close, even they are on a same net.

Both these two conditions are quite common on my board, and they don't actually break my design rule, how can I avoid these DRC warnings?

Thank you!

  • steve

    So look at Setup - Constraints - Modes and Design Options (Soldermask) where you can set the values you need for the rules. Look at Design Modes (Soldermask) to turn on the DRC's you require

  • LiamZh
    in reply to steve

    It's not about the constraint values or the modes.

    It seems that, when the solder mask is on the "pin" class, Allegro can associate it to a specific net, so it won't report any error when a same net shape or via is too close or even  overlapping, this is alright. But when it comes to the solder mask on the "package geometry", Allegro cannot do that, so it will report DRC warnings. 

    When you create a footprint, it's very common you need to draw the solder mask on the "package geometry" instead of "pin" class.  

  • steve
    in reply to LiamZh

    Soldermask is not "net" related - hence there are soldermask DRC's. What exact DRC are you seeing? Can you post a picture or a board file. You can add soldermask on a pin or under board or package geometry and the soldermask drc system will check for these depending on the rules you set. 

  • LiamZh
    in reply to steve

    Both the two pictures show the conditions when a via is on a soldermask, the first one will report DRC errors, while the second won't. 

    The difference is that the soldermask of the first one is defined on the "package geometry", and for the second one , the soldermask is defined one the "pin " class.

  • steve
    in reply to LiamZh

    OK - so the soldermask defined for on the pin is the same pin so I wouldn;t expect to see a DRC here anyway. The first picture you are overlapping a pin with a soldermask shape so the DRC makes sense.

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