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  3. SMD pin to SMD pin DRC errors when adding teardrops

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SMD pin to SMD pin DRC errors when adding teardrops

Fredda
Fredda over 6 years ago

When adding teardrops to SMD pads it seems like they become a part of the pad. This leads to SMD pin to SMD pin spacing DRC errors since the pads have suddenly increased in size. Is there a way to avoid this?

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  • CadAce2K
    CadAce2K over 6 years ago

    Maybe it's just me, but... I'll ask anyways. Why do you 'teardrop' your SMD pads? Over 30 years in the industry I've NEVER added teardrops to my SMD pins. Or any pins for that matter. Actually I've NEVER added teardrops to my vias either. I do have a note on the fabrication drawing that allows the fabricators to add them in highly-conjested (extra small traces/spaces) areas, but can't say any fabricator has. In my experience, the teardropping thingie comes from PADS, since it was so easy to add in PADS, but NEVER have I done it personally.

    BTW - I've worked for a good number of companies too, and have never been asked to add them.

    Just curious. Good day.

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  • Wild
    Wild over 6 years ago in reply to CadAce2K

    IMHO: One reason: With small features (i.e. CSP pins) , the failure point of the copper traces will occur at the junction of pad and the route.  This can be related to temperature cycling: the  CTE mis-macth of the PCB, copper and package will create fatigue at this joint.   The teardrop will strengthen  this weak spot.  So in a high reliability case these do become important.   Also it helps to strengthen the pads in rework.

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  • CadAce2K
    CadAce2K over 6 years ago in reply to Wild

    My engineers can rip the pads off boards regardless of teardrops. :) I use them for my destructive testing. Slight smile

    On a serious note though. We've doing severe temp cycling, and don't have the issues you mention. But lately (since my company takes thermal cycling to extremes. why? They don't know.) some of our thru-hole vias are failing. we're now moving to 'copper filled' vias (100%, no voids allowed!) to reliability. But we still don't do teardrops.

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  • CadAce2K
    CadAce2K over 6 years ago in reply to Wild

    My engineers can rip the pads off boards regardless of teardrops. :) I use them for my destructive testing. Slight smile

    On a serious note though. We've doing severe temp cycling, and don't have the issues you mention. But lately (since my company takes thermal cycling to extremes. why? They don't know.) some of our thru-hole vias are failing. we're now moving to 'copper filled' vias (100%, no voids allowed!) to reliability. But we still don't do teardrops.

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  • Wild
    Wild over 6 years ago in reply to CadAce2K

    I truly understand the rip up issue Slight smile

    We have packages that go into various industries, once such area is the Telephony world.  The hardware is designed with a 30 year life expectancy in some very cold (-40 dC) and hot (huts for example +125dC).  The accelerated life test's that are defined in standards like IPC 9701 and the Monotonic bend test's and IPC7902 can be very rigorous to meet. The temperature cycle is one of the test's used to define the expected life of a component mounting. 

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