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Community PCB Design & IC Packaging (Allegro X) PCB Design How to generate a the full list of all nets in my schematic...

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How to generate a the full list of all nets in my schematic?

PCBWiz
PCBWiz over 3 years ago
Hello,
          I need to generate a the full list of all nets in my schematic.
This helps me identify typos in net names which lead to connectivity issues.
Thanks.
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  • Jerry GenPart
    Jerry GenPart over 3 years ago

    If this is for DE-HDL, here's a great video -
    Article (20452337) Title: Allegro Design Entry HDL - Creating BOM and Netlist Reports (Video)
    URL: https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od0000007MLGbEAO

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