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  3. Drill hole to etch/Shape clearance (DRC)

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Drill hole to etch/Shape clearance (DRC)

archive
archive over 18 years ago

Is there any settings in allegro to check a drill hole to etch/Shape clearance (DRC).

Thanks in advance,
SATYA


Originally posted in cdnusers.org by satya1234
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  • archive
    archive over 17 years ago

    With the emerging of high speed signals there will be a need to eliminate via pads in internal layers - to reduce capacitance/match via impedance.
    in my design i need to remove via pads for specific nets type in specific layers.
    after changing the via defenition to pad smaller then hole
    i get traces hug the via hole.
    as i know it is not possible to add a keepout to via defenition.
    a poor work around is to eliminate the via pads as last action before gerbers.
    when the PCB will come back for Rev Upgrade we will have to restore the via pad size before routing.

    Roby Drath
    MEMTEK Ltd.


    Originally posted in cdnusers.org by robyd
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  • archive
    archive over 17 years ago

    With the emerging of high speed signals there will be a need to eliminate via pads in internal layers - to reduce capacitance/match via impedance.
    in my design i need to remove via pads for specific nets type in specific layers.
    after changing the via defenition to pad smaller then hole
    i get traces hug the via hole.
    as i know it is not possible to add a keepout to via defenition.
    a poor work around is to eliminate the via pads as last action before gerbers.
    when the PCB will come back for Rev Upgrade we will have to restore the via pad size before routing.

    Roby Drath
    MEMTEK Ltd.


    Originally posted in cdnusers.org by robyd
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