PB design Error

Hi Shahmaan,
If the Symbol in Capture has more pins than the Footprint in PCB Editor,
you will have to add the following:
In the allegro.cfg file under [ComponentDefinitionProps] add
PINCOUNT=YES

In Capture, go to the Symbol then select:
Options>User Properties>New>Name > PINCOUNT > Value > "number of pins of the Footprint", OK,OK, Save.

Unfortunately you will have to do this for every Symbol who's corresponding Footprint pincounts
donot match. Also if you have a Symbol used for 2 different Footprints who's pincounts are different,
such as a thru hole power transistor mounted both vertically and horizontally, with the horizontally
having 4 pins & the vertical having 3pins, you will need to make 2 different Symbols.

Our company was using Orcad Layout and just purchased PCB Editor. We just finished converting all of our Capture Symbols,
not a small job.

Hi Shahmaan,

If the pin count for your symbol in Capture and that in Editor do not match , then errors will be generated while generating Netlist.So if symbol in capture has less pins than the footprint in the editor , just add the extra dummy pins for the symbol and make them NC. Then you try generating netlist.

In order to aviod the problem that DAA_CID in above post , my suggestion would be instead of using 2 different symbols , I would prefer to just to add a dummy pin /pins each time to match the pin count in Capture and PCB footprint in Editor.

Regards,
Prajakta.

Concept HDL(Design Entry HDL) can deal with the issue easily. One symbol can have more packages.
For excample, one connector has two mechanical pins in one pack_type, another pack_type can use the pin as connect pin, and its pin_count plus 2.