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  3. Hatch and solid areas

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Hatch and solid areas

archive
archive over 17 years ago

Is there a way to have all internal plane layers a dynamic shape and solid and both external layers have a hatched fill? Thanks


Originally posted in cdnusers.org by MURPHYS
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  • archive
    archive over 17 years ago

    Hi Prajakta,

    In 14.2, the find filter will be all grey'd out if the shape is dynamic. This option only applies to static shapes.

    KP


    Originally posted in cdnusers.org by kp
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    archive over 17 years ago

    Hi kp ,

    Yes , it works for static shapes ... But it only voids few padstacks and gives a error message.....


    THE FOLLOWING PADSTACKS ARE MISSING THERMAL/ANTIPADS:
    (The pins will be ignored.)
    PAD60SQ36D-2
    PAD60SQ36D-3
    PAD60SQ36D
    PAD93CIR53D
    PUTPAD
    VIA3
    BERGPAD
    CAP4540PAD
    MTG98PAD
    LED3DIA
    RESCFRPAD
    RES3BY4WATTPAD


    THE FOLLOWING PADSTACKS ARE BEING VOIDED USING THERMAL/ANTIPADS
    BUT THIS IS LESS THEN THE REGULAR PAD PLUS DRC SPACING: (voids added anyway)
    PAD60CIR36D on net DB0
    PAD60CIR36D on net N1331587
    PAD60CIR36D on net 485-B
    PAD60CIR36D on net DVDD5
    PAD60CIR36D on net TXD
    PAD60CIR36D on net J13-FOUT/4
    PAD60CIR36D on net RXD
    PAD60CIR36D on net TGND
    PAD60CIR36D on net VBB
    PAD60CIR36D on net N449393
    PAD60CIR36D on net N507637
    PAD60CIR36D on net N492265
    PAD60CIR36D on net N517199
    PAD60CIR36D on net N1331633
    PAD60CIR36D on net RT
    PAD60CIR36D on net J13-TOGGLE
    PAD60CIR36D on net
    PAD80CIR65D on net ANVSS5
    PAD80CIR65D on net N812956
    PAD80CIR65D on net VBB
    PAD80CIR55D on net N814210
    PAD80CIR55D on net ANVSS5
    PAD80CIR55D on net N812952
    PAD80CIR55D on net VBB
    PAD80CIR55D on net N812956
    PAD80CIR65D on net AVVD7

    Can you explain what the above error means ....

    Thanks.
    Prajakta


    Originally posted in cdnusers.org by psj
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    archive over 17 years ago

    It sounds like you are using Thermal / Anti Pad Values for your Clearances and I assume that these padstacks have values which are either missing or smaller that the Pad + DRC. I suggest that you use DRC settings.

    KP



    Originally posted in cdnusers.org by kp
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