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  3. Can't assign refdes to copied symbols in 16.0

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Can't assign refdes to copied symbols in 16.0

archive
archive over 17 years ago

Hi, PCB expertrs,
I'm new to Allegro and using ver16.0 to learn. When I tried to copy a package, I can successfully do it and every thing seems OK (the RefDes changes to U*, lines and fanouts are copied too). However, I can not assign the Ref_Des for the copied package and an error reporting "Refdes was not found." I tried to show the elements. The original package has a "Ref_Des: U1" line while the copied package misses it (I suppose there should be a line like Ref_Des: U*).
Please help and your inputs are highly appreciated in advance.
Thanks.


Originally posted in cdnusers.org by laoge
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  • archive
    archive over 17 years ago

    Allegro is netlist driven therfore you can't copy a refdes. If you want to add an additional symbol that has or will have logic associated with it you need to add it via a netlist. The netlist could be Capture, ConceptHDL or third party format. If I need to add additional logic and there won't be a formal schematic for the design I use third party syntax e.g

    $PACKAGES
    DIP14_3 ! '74LS00-2' ; ACD1 U76


    $NETS
    A ; ACD1.7 U73.1 U74.1 U75.1 U76.1

    $END

    Where:

    DIP_3 = the Allegro symbol name
    74LS00-2 is the device file. This is in single quotes since there is a hyphen in the name.

    The $NETS section lists the net and it's connections.


    Originally posted in cdnusers.org by Trykon
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  • archive
    archive over 17 years ago

    Hi Laoge,

    Hi, what you are doing by copying existing circuits on the PCB is fine, and comes in very hand for design re-use (using the export sub-drawing feature) but yes it will gave the copied components a dummy Ref Des, these can be used on your design, but as Trykon says you then need to export the netlist w properties and within the $PACKAGES add the new Ref Des and footprint names for the design then import logic (other) the new parts will then be present in design with real Ref Des, then thats all you have to do now is do a Place Swap components. so you effectively swap the dummy part for the real part, then just delete dummy part when completed.

    Stephen Grant-Davies (QuantumCad
    www.quantumcad.co.uk


    Originally posted in cdnusers.org by stephen@quantumcad.co.uk
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    archive over 17 years ago

    Hi
    What are you using for your front end? Capture or HDL. I would not use the methods described above using the export netlist and modifying the netlist. It will work but you should make changes in your native schematic editor. If you make changes in the methods described above you will be come out of synch with the original schematic.
    Are you using Logic>Assign refdes command? Is the desired ref des in the schematic? You can not assign a ref des that does not exist in the netlist. If the component is in the netlist you should beable to assign it.
    I would contact Cadence support to assist you.
    Regards,
    BillZ
    EMA Design Automation


    Originally posted in cdnusers.org by BillZ_EMA
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    archive over 17 years ago

    Thanks guys. Your answer help me clarify some concepts.
    Cheers to you.


    Originally posted in cdnusers.org by laoge
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