why we should not route traces across antipad in the routing layer?.

The antipad is the cutout on plane layers around the through-hole pins in the above screenshot. This gap in the plane reduces the capacitance between the pins of the connector and the ground net, and improves signal integrity. We use anti-pads on all of our high speed design

The pair's line impedance is determined by the width of the line used as well as distance this line sits above the ground plane. Becuase no plane is present in antipad regions, routing over antipads causes the impedance of the line to change every time the signal goes over the gap in the plane. This causes impedance discontinuities in the pair and can degrade the signal integrity of the link.

In our designs, we decrease the antipad size so that the the pair is always routed over a ground plane. We also center the pair within the array of pins to keep the ground plane under the pair as consistent as possible.

When this is not possible, we even sometimes place voids in the plane to make the impedance discontinuities consistent across both legs of the pair. This makes any discontinuity and the noise that it creates symmetric between both legs. Since it's symmetric, it's common-mode noise, and is rejected by the differential receiver.

In the XL version of Allegro there is an option available to find segments that are over voids - which help you find possible impedance changes. The command for this is Display->Segments Over Voids

Hi,
thank you very much Remaley for quick fats reply, now i got the idea.
but the strange thing in the allegro16.0 antipad wil not work on the plne , whatever constraint we will set that wil effect , after your reply i redused the antipad size by10mil (previously it outer dia+20mil),then i updaed the pad stack but it is not updated then I reduced the via to shpe constraint to 5mil (previously 10mil) , then updated the shape it got updated , now the trace wil run over the gnd plane it will not enter in to the void area

reducing the antipad size will casue any effect ? , is there any standard minimum value for shape to via air gap .



Have a pleasent day,
Regards,
Girish

There's no fast recommendation I can give you. We use the guidlines given by Amp for their Zd press-fit connectors. See below

http://catalog.tycoelectronics.com/TE/Presentations/20GC015-1_RevB.pdf

girish_mn: Why are your diff pairs coming out of the pin pairs in such an unbalanced way? Yuck. You can set Allegro up so that the pin pairs come out even.

remaley228 explained the reason fairly well. Even with all this -- the diffpair signal can arrive with one leg severely out of phase with respect to the other. Anyone care to explain? :) Hint: You probably have to deal with this for 10Gbps and up signaling only...