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  3. export virtuoso schematic to Allegro

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export virtuoso schematic to Allegro

archive
archive over 17 years ago

Hi all,
Does anyone know a way to transfert semi-automatically a virtuoso schematic in a Allegro schematic. I know it wouldn't be a seamless convertion, since in virtuoso, we do not care about footprint and so on. However the name of nets, typical resiscances, capacitances and their values, could be generated in order to gain time and avoid human error in changing values or name.
Please not that I have no knowledge in Allegro, but I want to simplify the work of my PCB designer.
Thanks for any help.
Regards,


Originally posted in cdnusers.org by ebecheto
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  • archive
    archive over 17 years ago

    Why do you want to do this? If you want to export a 'pcb' netlist then why did you use Virtuosos...just curious. What do you want to accomplish in Allegro?


    Originally posted in cdnusers.org by khurana
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  • archive
    archive over 17 years ago

    I am an Analog Designer, I design a chip, and then I have to configure a test board, with its decoupling capacitances, setup resistances and so on. But since I have the test bench of my chip already done in Virtuoso, I print it and gave it to my dearest pcb designer colleague as a setup of what I need on my pcb. I think it is a waist of time for him to re-write all the net names and resistances instances name (R1, R2, R3, ...C1, C2, C3 ..., IN1, IN2, IN3, ... OUT1, OUT2, OUT3..), since I have already done it on MY schematic. Industry always claim for time to market faster solution and that feature is not possible ?? I really blame on non-interoperability between Virtuoso and Allegro. Maybe it is possible in cadence IC6, but I am still using IC5.10.41.


    Originally posted in cdnusers.org by ebecheto
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  • luvishis
    luvishis over 16 years ago

    Hi,

    There is a solution.

    You need to export EDIF200 schematic from Virtuoso.

    Then this EDIF200 schematic should be used to translate to ConceptHDL (AllegroEntry HDL).

    It could be that some mappings will be required in the process.

    Elgris Technologies, Inc ( www.elgris.com) has an EDIF200 to ConceptHDL (AllegroEntry HDL)

    schematic translator.

     

    Regards

     

     

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