"Enable Hierarchical Variants" option is disabled Design Entry HDL

I found this old post that never seemed to have gotten resolved and it sounds like the same issue i'm having...

https://community.cadence.com/cadence_technology_forums/pcb-design/f/pcb-design/35959/why-hierarchical-variant-disabled-in-allegro-design-entry-hdl-16-6-2015

I have a hierarchical design.  The top level design uses a REUSE block that is placed within it.   That reuse block exist in another project library and it has variants defined.   So after i place it's symbol within the top level schematic of a different project, why can i not enable the hierarchical variants for it?

From the documentation and tutorials, it looks like the reuse blocks placed in examples exist in the same library as another design name.  I'm not sure if my use of this block from a different project library could be the reason.  As mentioned in the never resolved post reference above, the documentation states...

"""

Note: If the Enable Hierarchical Variants option is disabled, it could be because of the following reasons:

- There is no variant information in the lower-level block (reusable block).

- Variants are not defined for the top-level block.

- The block has not been identified for hierarchical variants.

"""

I'm sure there is variant information in the reuse block.    But i'm not exactly sure what the second two bullets are suggesting.   Do i need to define a variant in the main schematic now?   I tried, but it didn't help anyways, nor do i think that should be necessary.

How to identify a block for hierarchical variants?  Is there something i'm missing?

Thanks to anyone who can help!