• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      oldmouldy
      oldmouldy 65 Points
    • 2
      MZ20250602835
      MZ20250602835 45 Points
    • 3
      steve
      steve 40 Points
    • 4
      JohnFr38
      JohnFr38 20 Points
    • 4
      RJ202412171240
      RJ202412171240 20 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,848 Points
    • 2
      oldmouldy
      oldmouldy 11,015 Points
    • 3
      eDave
      eDave 7,576 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,226 Points
    • 5
      redwire
      redwire 5,113 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Discussion

    Is it a bug in 15.5?

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    2 replies • 13586 views
  • Discussion

    Is it a bug in 15.5?

    Category: PCB Design

    By archive

    •

    started over 19 years ago

    0 replies • 12943 views
  • Discussion

    Checks In DFM

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    3 replies • 14296 views
  • Discussion

    ConceptHDL Library - Open up cell by PART_NUMBER defined in part table

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    1 replies • 958 views
  • Discussion

    Using antipads with DRC on planes

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    4 replies • 14721 views
  • Discussion

    Do Files

    Category: PCB Design

    By archive

    •

    started over 19 years ago

    0 replies • 12847 views
  • Discussion

    Defending Allegro

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    9 replies • 19636 views
  • Discussion

    Netlist files

    Category: Allegro X PCB Editor

    By archive

    •

    updated over 19 years ago by archive

    2 replies • 14689 views
  • Discussion

    definition of classes propety

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    1 replies • 13333 views
  • Discussion

    VoltageSwing in Pulse simulation

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    4 replies • 14329 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information