• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      CF202606104231
      CF202606104231 51 Points
    • 2
      Zhifeng Jin
      Zhifeng Jin 45 Points
    • 3
      Electro Node
      Electro Node 35 Points
    • 4
      EnthuEDA
      EnthuEDA 31 Points
    • 5
      steve
      steve 20 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,548 Points
    • 2
      oldmouldy
      oldmouldy 10,730 Points
    • 3
      eDave
      eDave 7,286 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,231 Points
    • 5
      redwire
      redwire 4,308 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Discussion

    How to handle the Via or Thru-Hole plating thickness value?? Is it available?

    Category: PCB Design

    By ichliebedich

    •

    started over 4 years ago

    0 replies • 10289 views
  • Discussion

    allegro package menu file (apd.men) not working

    Category: PCB Design

    By ichliebedich

    •

    updated over 4 years ago by ichliebedich

    1 replies • 11221 views
  • Discussion

    L293DNE Quadruple Half-H Drivers

    Category: PCB Design

    By kaylee

    •

    started over 4 years ago

    0 replies • 10823 views
  • Discussion

    DE HDL Printing Net Attributes

    Category: PCB Design

    By tmd63

    •

    started over 4 years ago

    0 replies • 10304 views
  • Discussion

    Aliases nested too deeply

    Category: PCB Design

    By charliejuk

    •

    started over 4 years ago

    0 replies • 11071 views
  • Discussion

    Copper pull back

    Category: PCB Design

    By HSID

    •

    updated over 4 years ago by excellon1

    1 replies • 12424 views
  • Discussion

    ROHS FPGA in a leaded process

    Category: PCB Design

    By atoddrich

    •

    started over 4 years ago

    0 replies • 10137 views
  • Discussion

    Allegro footprint .dra file version too old to import into Altium?

    Category: Allegro X PCB Editor

    By hobbskw

    •

    updated over 4 years ago by hobbskw

    4 replies • 14952 views
  • Discussion

    Allegro Free Pysical Viewer 17.2 show measure min. setting

    Category: PCB Design

    By Leapsy Tom

    •

    started over 4 years ago

    0 replies • 11839 views
  • Discussion

    axlUIViewFileCreate not working for html file 17.4

    Category: Allegro X Scripting - Skill

    By HJerry

    •

    updated over 4 years ago by HJerry

    1 replies • 5994 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information