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PCB Design & IC Packaging (Allegro X)

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Forum - Thread List

Latest Posts

  • Discussion

    How to define via structure in allegro /Orcad 17.x

    Category: PCB Design

    By GK MN

    •

    started over 6 years ago

    0 replies • 16217 views
  • Discussion

    United Kingdom 17.4 Orcad Users

    Category: PCB Design

    By digital1

    •

    updated over 6 years ago by steve

    1 replies • 14152 views
  • Discussion

    Can I link a inductor part to resistor part by using CIS variant design?

    Category: PCB Design

    By Boqian Jiang

    •

    updated over 6 years ago by Boqian Jiang

    2 replies • 15384 views
  • Discussion

    TH pin does not connect to a shape of the same assigne net

    Category: PCB Design

    By KobiC

    •

    updated over 6 years ago by CadAce2K

    11 replies • 20621 views
  • Discussion

    Shape to route keepout gap?

    Category: PCB Design

    By Descoteaux78

    •

    updated over 6 years ago by Descoteaux78

    8 replies • 18553 views
  • Discussion

    Any Way to identify double hits (Via)?

    Category: Allegro X PCB Editor

    By Alice

    •

    updated over 6 years ago by eDave

    36 replies • 51030 views
  • Discussion

    SMD pin to SMD pin DRC errors when adding teardrops

    Category: PCB Design

    By Fredda

    •

    updated over 6 years ago by jc teyssier

    17 replies • 23138 views
  • Discussion

    Drill file error

    Category: PCB Design

    By jatins

    •

    updated over 6 years ago by Dale Peterson

    7 replies • 20934 views
  • Discussion

    Silkscreen(Refdes) Alignment

    Category: PCB Design

    By AMMU CV

    •

    started over 6 years ago

    0 replies • 1124 views
  • Discussion

    D.I.E format

    Category: Allegro X APD

    By admin

    •

    updated over 6 years ago by Choloe Anne

    8 replies • 24452 views
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