Importance of OnDie parasitics of a buffer model in PBA and SLA analyses

In newer high-speed digital applications, where multiple data lines can run up to 10s of Gbps, parasitics capacitance and inductance of a buffer model can produce impedance mismatch along the signal path. Any mismatch caused by parasitics will produce reflections somewhere down the line, ultimately increasing timing jitter and bit-error rates. Therefore, OnDie parasitics and Package parasitics can never be ignored in any high-speed systems.

OnDie Parasitics:

OnDie parasitics are the essential components of a buffer model, which constitutes a die circuit mainly for power-aware simulations. OnDie parasitics of a Tx and Rx IBIS block model the power net of the die. These OnDie parasitics values impact the PDN analysis of a system when working in non-ideal power mode. If the system works in an ‘Ideal Power’ mode, OnDie parasitics do not have any impact on the simulation results.

In general, the OnDie parasitics circuit has its place in between any IBIS model and its related package model. The equivalent schematic model of the OnDie parasitics circuit is shown below:

There are three main components that constitute the OnDie parasitics circuit model:

1. Short Resistor - It is a connection between the input and output pins of a model. Generally, this value is obtained from the chip-level model extraction; if you know the equivalent resistance from the IO cell to bump in a model, you can apply the value on this section.

2. PDS Resistor - It is the resistance value from the IO cell to bump, which forms the power-to-ground loop resistance. It is used in P/G modeling by the RC circuit, as shown in the above schematic model.

3. PDS Capacitor: It is connected in a series with the PDS resistor and connected to ground on the other end to form a parallel RC circuit in P/G modeling.

Parallel Bus Analysis (PBA):

Parallel Bus Analysis (PBA) topology consists of Controller IBIS block, PCB block, Memory1 and Memory2 IBIS blocks.

From the above figures, it is evident that there is a significant effect of OnDie parasitics on TopXp Parallel Bus Analysis.

Serial Link Analysis (SLA):

Serial Link Analysis (SLA) topology consists of Tx block with IBIS-AMI, PCB block and Rx block with IBIS-AMI.

When Performing a channel simulation in TopXp SLA, there is little to no effect with the OnDie parasitics enabled.

Click here to learn more about OnDie parasitics of a buffer model in Sigrity Topology Workbench.