Overview of an IBIS File

I/O Buffer Information Specification (IBIS) is a standard for describing the analog behavior of the buffers of digital devices using plain-text-formatted data. IBIS emerged in 1993 with a mission to satisfy the modeling needs of the growing signal-integrity community while preserving IO circuit and semiconductor process intellectual property.

 The advantages of using IBIS behavioral models are:

• IBIS models protect proprietary information about the modeled circuit, as no process or circuit-design information is disclosed.
• IBIS models provide competitive accuracy, as nonlinear aspects of I/O devices as well as package parasitic and ESD structures are considered in the model parameters.
• Since IBIS is a behavioral model, the simulation time for an IBIS model is faster in comparison with a SPICE model.
• IBIS models are used by almost any EDA tool in the industry.
• IBIS models are easy to create and validate, as they can be made from bench measurement or from simulation data.

A basic IBIS model consists of three main sections: header information, component description, and model data.

 File header information: This section stores some valuable information such as the IBIS version that specifies the IBIS template version, file name, and file revision that tracks the revisions level of a .ibis file.

 Component description: This section contains information about the component’s manufacturer and specifies all pins on a component (pin name, signal name, model, and package parasitic).

 Model statement: This section is used to define a model and its attributes such as the model type (Input, Output, 3-State), Vinl, Vinh, C_Comp, receiver thresholds, temperature range, voltage range, I-V tables, Ramp Tables, etc.

You can view/edit an IBIS file using AMM IBIS Editor in Topology Workbench.

This document guides you through the basic process of assigning vendor IBIS models to different blocks in Topology Workbench using the SystemSI-PBA workflow. 

Team SimTech

Cadence Design Systems