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Different Results with same layout

PM202507106649 2 months ago

Hi Everyone,

I was doing a PDN analysis for a VDD power net, since the layout file was really heavy i split it into 4 number of layouts since there were 4 VDD nets going to 4 different DUT's. When i simulated the layout with all the 4 VDD in one layout file with the decoupling capacitors ESL at 0.2 nH i got the impedance around 20mOhm, now with the same layout when i split it into 4 individual layout one for each VDD and the same decoupling cap with same ESL the result is 23mOhm. I do not understand why this difference occurs between simulating the entire layout and the manually cut individual layout ?

If someone could please explaint why this is the case would be really helpful for me to understand for the next time.

Thank you

0 jillashiva 1 month ago

your return path is shared among all 4 VDD nets ..so coupling could be a possible reason
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0 PM202507106649 1 month ago in reply to jillashiva

Yes, i understand that. But i made a mistake in the post , its the other way around, for single site i get lesser impedance than when i simulate the entire pcb board. I do not understand this opposite effect.
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