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SI Engineers, This One's for You! - Live Experts Session on Aug 19th 2026

Renu Vibha

Curious about S-Parameters, Insertion Loss, or Return Loss?

Bring your questions and join our upcoming Cadence Sigrity SI/PI Live Experts Session.

Learn proven analysis techniques, hear practical use cases, and interact directly with Cadence specialists.

Topic - Pre-layout Simulations covering Aurora Workflows, Topology Workbench (Pre-layout), Power SI ERC

Participate here  on August 19th at 7:30-8:30PM IST.

Bring your questions. Leave with answers

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    In practical PCB or package designs , how are S-parameters and return loss measurements used ? Give me a real world example to validate performance before a product goes into manufacturing? 

  • 0 in reply to CF202606104231

    Thank you for the question. In real-world PCB and package design, S-parameters are used to characterize how signals propagate through interconnects, while return loss (S11) is used to measure how much signal energy is reflected back due to impedance discontinuities.

    For example, in a DDR5 channel, engineers can extract S-parameters for the traces, vias, connectors, and package and evaluate return loss across the operating frequency range. If excessive reflections are identified, the routing or via structure can be optimized before fabrication. This helps reduce SI issues during hardware bring-up and increases the likelihood of a successful first prototype spin.

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  • 0 in reply to CF202606104231

    Thank you for the question. In real-world PCB and package design, S-parameters are used to characterize how signals propagate through interconnects, while return loss (S11) is used to measure how much signal energy is reflected back due to impedance discontinuities.

    For example, in a DDR5 channel, engineers can extract S-parameters for the traces, vias, connectors, and package and evaluate return loss across the operating frequency range. If excessive reflections are identified, the routing or via structure can be optimized before fabrication. This helps reduce SI issues during hardware bring-up and increases the likelihood of a successful first prototype spin.

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