During ICCAD earlier in the month, there was the 2nd WOSET, which stands for Workshop on Open-Source EDA Technology. I wasn't there but Anton Klotz, who runs the Cadence Academic Network in Europe, was there and this is based on his report.

I wrote about 2018 WOSET late last year in my post ICCAD and Open-Source CAD. One very visible program is OpenROAD which I wrote about recently in OpenROAD: Open-Source EDA from RTL to GDSII. Many other projects in the open-source EDA world contribute to OpenROAD.

There has been a big increase in the number of open-source EDA projects, as you can see from the graph which shows that there are now 66 open-source EDA projects compared with just 25 projects two years ago.

I think that everyone who works in EDA or design methodology, whether in the commercial world or academia, needs to keep an eye on developments here. The more infrastructure that gets created, the more state-of-the-art research algorithms will only run on that infrastructure. Some tools and flows potentially may become competitive alternatives to existing flows over time, especially away from the leading edge. The slowdown of Moore's Law makes these older processes more relevant as only the highest volume designs can afford to keep in the most advanced node.

Drivers for Open-Source EDA

There are a number of drivers for open-source EDA, but mostly they revolve around the difficulty of doing EDA tool research in the current environment. It is too difficult to interface to commercial tools like Cadence since many of the interfaces are not open. Even OpenAccess (which Cadence donated to Si2 many years ago) is considered not to be "real" open-source because of its license agreement restrictions. Another problem is that it is a license agreement violation to benchmark commercial tools, making it hard for academia to know if they are making progress or not. Of course, academia is always most driven by the need to produce academic papers, PhD theses, and so on. However, it is hard for academics to publish work done with commercial tools due to these benchmarking and reproducibility of results.

Andrew Kahng actually spoke about this at CDNLive in Silicon Valley a few years ago, and I covered it in Andrew Kahng on Industry-Academia Cooperation. There he pointed out:

The biggest issues facing traditional academic EDA research seem to be not knowing the critical problems that need the most attention, and not having access to true advanced libraries and process data. For the latter, there are “academic” libraries and designs that are available but they are often unrealistic, lacking MCMM, multiple-power domains, multiple-clock domains, memories, and more. This results in years of delay or simply that “good” academic solutions such as sizers, cannot be used in real designs since they are only “good” in the context of the academic benchmarks that are available.

Most work is targeted at the GLOBALFOUNDRIES 12nm process, since it is the only US-based foundry with FinFET technology, so it is important to the defense industry who sponsors some of the work (such as OpenROAD). Not surprisingly, there is lots of work going on to incorporate machine learning into tools. This is such a hot topic that adding machine learning to "boring tools" mean you can get publishable work.

The opening keynote was given by Tim Edwards of efabless. He gave a history of how we went from scalable design rules in the Mead-Conway era but after about 0.25um that stopped working (and it breaks completely with FinFETs). This was the era of PDKs that hid the detailed foundry design rules, making life impossible for academics. He spent most of his presentation describing an approach (provisionally called Auto-PDKs) for getting tools and foundry processes to play together.

The gold ring for WOSET and the projects contributing is that this is the New Golden Age of Open Silicon. Open-source EDA tools, open-process PDKs, and open hardware will create this new era. That, at least, is the hope of Tim and most of the attendees.

One big development is OpenDB. Athena Design Systems had created a commercial EDA database and physical data model. The company went out of business several years ago, but the database was just recently fully open-sourced. For the first time ever, academia has access to a commercially created layout database, instead of relying on reading and writing files. Now it will be possible to have incremental algorithms with some shared engines (especially for timing). In his presentation on this, Tom Spyrou listed features that should be added. Athena went out of business in 2008, so a lot has happened in the semiconductor world since then, and many of these features are needed to bring OpenDB closer to its industrial counterparts.

• Verilog logical hierarchy which is kept synchronized with the DEF view during netlist editing and optimization
• Notification mechanism for applications to subscribe to during netlist editing
• Multi-mode SDC schema
• Multi-corner delay information
• SPEF reader and writer for data model
• TCL and Python APIs

I won't go over any of the other papers presented. But to give you a flavor of the breadth, here are a few areas:

• ML-supported synthesis
• Several analog layout generators
• DFT toolchain
• ML-based parasitic extraction
• Memory compilers
• Detailed router
• I/O placer
• ML for power-delivery networks
• Thermal models for self-heating analysis

Learn More

 The papers (but not the presentations) are on the WOSET repository on Github.

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