TSMC OIP: 3DFabric Alliance and 3Dblox

The press meeting at the recent OIP was all about 3DFabric and 3Dblox. If you don't know what those are, then read on. I've said before that advanced packaging is the hottest area in semiconductors right now.

I wrote about other aspects of OIP in my recent post TSMC OIP: FinFlex, Analog, mmWave, and Awards.

Dr. Kevin Zhang

Before I get to the two big announcements of the day, it's worth taking a look at TSMC's advanced packaging portfolio. This was presented by Dr. Kevin Zhang, who is SVP of Business Development. I think, in some ways, they have simplified the portfolio from a few years ago.

This is the basic portfolio of advanced packaging that goes under the name 3DFabric. There is TSMC-SoIC, InFO, and CoWoS (and yes, the capitalization really is weird on all of them). More details on each below.

First, InFO (see diagram above). This has been in high-volume production, especially in mobile, for eight years.

Next, CoWoS, which stands for chip-on-wafer-on-substrate. This is focused on bigger chips, even designs that are too big to fit in a single reticle and so could not be built as an SoC.

CoWoS-R uses an organic substrate with up to 6 redistribution layers. The focus is adding high-bandwidth memory (HBM) stacks to one or more processors. As you can see, designs can be as large as 3.3X the reticle size. These things are enormous. TSMC had some examples on their booth, but we were not allowed to photograph them, unfortunately.

TSMC-SoIC is a completely different type of technology, with chips being bonded together copper-to-copper, either chip-on-wafer (where the chips can be different sizes) or wafer-on-wafer where the die have to be the same size, and two whole wafers are bonded together face to face. This is especially appropriate for putting a CMOS image sensor (CIS) on top of its processing logic. And yes, CIS works like that...the light actually comes through the back of the thinned wafer so that the interconnect does not obstruct it.

Dan Kochpatcharin

Dan took over from Kevin. He is the Head of Design Infrastructure Management Division at TSMC. He started with some history of OIP, which I will skip, or this post will get too long. The two main things he was telling us were the creation of the OIP 3DFabric Alliance, and the 3Dblox standard. Or, as he put it:

Extend OIP Ecosystem Collaboration from 2D to 3D.

The 3DFabric Alliance extends the OIP ecosystem from what it has been historically (on the left in the above diagram) to add all the partners on the right. Some are the same (like EDA and IP), but some are now like memory, OSAT (outsourced semiconductor assembly and test), substrate manufacturers, and manufacturers of test. Below are the initial members of the 3DFabric Alliance. Cadence appears in three boxes; for EDA, for IP, and for test (no, we are not supplying testers, just software for test generation).

3Dblox

Next up, 3Dblox. This is an open standard, the purpose of which is:

• 3Dblox provides generic language constructs capable of representing all current and future 3D-IC structures.
• Modularize the 3D-IC structures such that EDA tools and design flow can be simpler and efficient.
• Ensure standardized EDA tools and design flows are compliant to TSMC 3DFabric technology.

The above chart needs to be read from the bottom. 3Dblox starts with definitions of all the chips and chiplets. Then how they are instantiated (where they go physically and how many of each). Then the connectivity. And path assertions for things like signal integrity.

Cadence supports all of the flavors for all of the different 3DFabric technologies in TSMC's portfolio and has been certified by TSMC.

Importantly, this is going to be an open standard. After all, people need to be able to integrate chips from different foundries into the same package. To some extent, this already happens since TSMC doesn't make memories, and all those HBM memories come from the memory suppliers.

Dan's summary was:

• TSMC will open 3Dblox to the industry
• Customers, partners, OSAT, and other foundries can focus on innovations
• TSMC will continue to enhance 3Dblox, drive EDA partner enhancement and make it available to the industry

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