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At the recent TSMC OIP Symposium, John Park presented Advanced Auto-Routing for TSMC InFO Technologies. InFO stands for "integrated fanout" and is the lower performance, lower complexity technology for advanced packaging. For details of TSMC's whole packaging portfolio, see my post TSMC OIP: 3DFabric Alliance and 3Dblox. Here's the slide TSMC presented from that presentation on InFO. As you can see, InFO comes in a number of different flavors.
The first implementation, back in 2016, was InFO-PoP for mobile, adding a DRAM package on top of the application processor die. Then InFO_oS for HPC, allowing multiple die to be put in increasingly large packages. The latest technology, InFO_3D allows logic to be stacked vertically on logic, with routing underneath to distribute the power delivery network and signals.
I won't reiterate all the arguments in favor of using advanced packaging rather than simply scaling and putting everything in the most advanced node. We'll just take that as a given in this post. For John's longer exposition on this topic, see my post EDPS: When Chips Become 3D Systems and the Challenges of 3DHI.
As I've said before, advanced packaging and heterogeneous integration have become the hottest area in all of semiconductor design today.
The table above shows how much more challenging routing has become. On the left are the requirements for flip-chip ball-grid-array (FCBGA). There are, at most, a few thousand connections. There is RDL signal routing to spread out the signals to the solder balls from the comparatively small single die.
On the right is the technology we are talking about today, 3D heterogeneous integration wafer-level packaging, or 3DHI-WLP. The package typically contains multiple chiplets, perhaps tens of thousands of signal connections, so the RDL signal routing is not just distributing the signals but also handling the chiplet-to-chiplet routing too. Power routing is another complication with a number of feasible approaches.
Diving down to another level of detail, among the challenges are:
To address these challenges, Cadence and TSMC have been working together to develop next-generation automatic signal routing solutions for InFO technologies:
The automatic power routing solution:
Putting it all together, the flow is:
As you can see from the above tables, the speedups are impressive (factors of over 100). And using multi-threaded detailed routing with lots of cores also results in speedups of over 10X.
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