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Late in January, Cadence and Arm ran a joint webinar on implementing advanced microprocessors in advanced processes using the digital full flow for implementation and signoff. The opening presentation was by Arm's Dermot O'Driscoll. Then Yufeng Luo presented the digital full flow. I have covered that several times recently so I won't duplicate that. If you want to learn more, see my post Optimized Digital Design, Implementation, and Signoff on TSMC N3 where Yufeng was again the presenter. Or you can watch his presentation from January on demand.
All the videos are also available on demand (if you have a Cadence account) on the Cadence website. Or just click on the banner below.
Dermot is Arm's VP of product solutions for the infrastructure business. His presentation was titled Collaboration in a Time of Change. But in fact, Arm and Cadence have been collaborating on implementation flows for many years, going back to 2005 when Arm built its first superscalar out-of-order (OoO) processor, the Cortex-A8. This was intended to have a semi-custom design flow but it realized that a 12-18 month development cycle for each implementation was not going to work for Arm's customers. By collaborating with Cadence, this was brought down to 7-10 days.
This was a pure physical design flow. By 2010, the Cortex-A15 was synthesizable (as, I believe, have all high-end processors been since then).
These headlines go up to 2019 and Arm's first Neoverse processor, aimed not at mobile or client, but data center infrastructure. Since then, as you can see from the chart below, there has been a lot of development. I'm not going to go into the details of all of them, but two big ones are the Graviton and the 64-core Graviton 2, designed by Amazon/AWS subsidiary Annapurna. For more about that, see my posts Xcelium Is 50% Faster on AWS's New Arm Server Chip and Climbing Annapurna to the Clouds. One reason that this is so significant is that AWS is using its own chips and, as a result, there is no need for a long sales and development cycle, and a slow ramp.
In 2020, Ampere announced the first 80-core CPU. And you probably heard that an Arm-based supercomputer called Fugaku took the #1 spot on the top 500 supercomputer table. To read more about that, see my post Japanese Arm-Powered Supercomputer Takes the TOP500 Crown.
And you can't go for five minutes these days without talking about 5G and, in this market, Nokia and Marvell are working together.
One thing that seems to be changing is that cloud vendors are demanding custom silicon solutions. There are new players entering to satisfy this demand, but also a trend towards cloud vendors designing their own silicon so that they get just what they require. Here are a few headlines. One of the big drivers is that workload requirements are growing faster than silicon performance.
So this collaboration between Arm and Cadence has enabled Arm and its partners to escape from their mobile cage and, in a very short time, deliver extremely high-performance data center processors. It is still early days but data center servers are changing.
You can see Dermot's entire presentation here. You can also watch Yifeng's presentation Building Arm Total Compute for Optimal Performance Within Power Budgets.
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