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Paul McLellan
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DAC
Design Automation Conference

DAC 2022: Day 2

13 Jul 2022 • 15 minute read

 breakfast bytes logocadence dac boothI covered Day 1 (and Day 0) of the Design Automation Conference in my post yesterday DAC 2022: Day 1. Tuesday was Day 2.

The keynote sessions started off with awards. Anirudh Devgan, Cadence's CEO, is the honoree of the 2021 Kaufman Award. He received his award earlier this year, and you can read about that in my post The 2022 Kaufman Dinner. But if an award is worth bestowing once then it is worth bestowing twice, and Anirudh received the award a second time at DAC (before going on to deliver the keynote).

Spectre

Later, one of the other awards was for the ACM/CEDA A Richard Newton Technical Impact Award in Electronic Design Automation. To be eligible for this award, the publication needs to have been at least ten years before. In this case, the publication was 27 years before, titled Efficient Steady-State Analysis Based on Matrix-Free Krylov Subspace Methods, which was published at DAC in 1995. The three authors were Jacob White of MIT, Ken Kundert of Cadence, and Ricardo Telichevesky of Cadence. Well, Ken and Ricardo worked for Cadence back then. In fact, both Ken and Ricardo worked for Cadence when I ran Custom IC, where they were the brain-trust of the Spectre family of circuit simulators.

Computational Software and the Future of Intelligent Electronic System Design

anirudh devganHaving received his second Kaufman Award, Anirudh was soon back on the stage to deliver the keynote titled Computational Software and the Future of Intelligent Electronic System Design. He started by explaining that computational software is basically computer science plus math, or CS+math.

semiconductor drivers

At one level, there are drivers for the semiconductor industry and so indirectly they are drivers for EDA. In the memorable description of Mike Santorini, EDA is the water-skier behind the speedboat of the semiconductor industry. The current drivers are hyperscale computing, 5G, autonomous vehicles, Industrial IoT, and AI.

eda drivers

The above diagram shows the drivers for EDA (and Cadence). Three that Anirudh called out as the most important:

  • System companies building their own silicon
  • 3D-IC or chiplet-based design
  • EDA with increasing automation based on AI

As a result, the future growth in Moore's Law is not coming from simple scaling, but from putting more onto the chip (multicore, domain-specific computing).

But EDA has its own version of Moore's Law, leading to a 1000X increase in productivity over the last two decades. On the left is the increase in capacity for digital implementation (synthesis, place and route, static timing signoff, and so on). On the right, the development of Cadence's emulation capability, going back to Quickturn's early days and all the way up to Palladium Z2 today. By the way, 1000X in 20 years is monthly growth rate of 3%, not far off 1% per week.

There is a future stretching out ahead of us too: 3nm coming soon, then 2nm, then 1.4nm, then 1nm. So at least three or four process nodes, a decade or so. But then 3D-IC and software kicks in, meaning we have 30 years of innovation ahead of us, driven more by integration than transistor scaling.

All software will become more and more computational. There is an enormous opportunity for those of us in EDA to expand our knowledge of CS+math into neighboring areas. EDA 1.0 is basic semiconductor and board EDA. EDA 2.0 takes that to the system level. And EDA 3.0 takes ML and big data algorithms into new domains.

The State of EDA: A View from Wall Street

jay vleeschhouwerOn Sunday, Charles Shi of Needham presented a somewhat pessimistic view of the semiconductor industry heading into a downturn,  but one that EDA will be relatively immune to (people still need to design those next-generation systems even if the current version is not selling so well). Then on Monday, Richard Wayrzyniak of Semico Research Corp gave a more optimistic view of the semiconductor cycle, with no imminent downturn. On Tuesday, it was the turn of Jay Vleeschhouwer of Griffin Securities, who didn't really look at the semiconductor industry at all, just the EDA industry. You can sense his frustration at the Siemens acquisition of Mentor since the numbers are no longer so accessible and the concept of a share price or a market cap doesn't exist for them any more.

Jay started with the big picture. The EDA industry has grown each year for over a decade, reaching $10B last year. Jay is forecasting $11B for 2022. The industry has more than doubled over the last decade and become more concentrated among the big four EDA companies. The EDA big three have increased their share of industry revenues from less than 75% a decade ago to more than 85% today (and more than 90% if you add in the EDA part of ANSYS' revenue).

If ever there is an "up and to the right" graph then this is it, EDA industry revenues (TTM means "trailing twelve months" which smooths out some of the quarter-to-quarter volatility).

The industry has also become more concentrated. This graph shows the market share of the "big three". One big reason for this is the industry R&D cycle. The big two have invested $2.66B in R&D, about 36% of revenues. Jay estimates this will rise to $2.96B this year, rising to $3.3B by 2024. Of course, most R&D spending goes on engineers, and this is reflected in the engineering headcount of the big two, at around 14,600 at the end of 2021, up around 1,000 from 2020.

emulation and prototyping revenue

One of the most important changes to result from this R&D spending over the last few years has been the growing importance of hardware-based verification (emulation and prototyping) and also of IP. The above graph shows big two emulation (blue) and prototyping (red) revenues.

cadence breakdown

Cadence is the only EDA company that Jay had broken out by segments into a reasonable level of detail, as you can see in the above graph.

Building Resiliency: The Next Imperative in Design

At lunchtime in the pavilion, Arm fellow and senior director Teresa McLaurin talked about Building Resiliency: The Next Imperative in Design. She is actually a design-for-test (DFT) engineer, so she used test as her example as to how the industry has been forced to up its game and build more resilient systems. As it happened, as she started I got a tap on my shoulder and sitting behind me was Simon Segars, who, until recently, was Arm's CEO. At Anirudh's keynote, I talked to Wally Rhines and saw Lip-Bu Tan in the distance, so I claim my "I spy" badge for a complete collection of ex-CEOs.

Teresa talked about how, when she started, testing was driven by functional test vectors. These would be run through fault grading to see how many faults (usually modeled as signals stuck-at-0 or stuck-at-1) would be detected by those vectors. Engineers would work for a long time to add incremental vectors to successfully detect the hardest faults.

The first step to increasing resiliency was to go to scan test. This didn't operate the chip in any sort of normal way, so it was only good for detecting manufacturing defects. But it was expensive in terms of added circuitry and added interconnect. But in the end, this was accepted because it was important to have the test program ready by the time the chip came out, and the functional approach just didn't get there in time. We learned to live with the PPA effect.

But test costs kept on growing as the scan paths got longer and longer. In 2001, the ITRS predicted that test would become more expensive than the silicon since we were creating such large scan patterns that tester were having to reload the patterns which took seconds. Tester cost is mostly just the number of seconds on the tester to depreciate the capital cost.

The next "solution" was logic built-in self-test (LBIST). This had a pseudo-random pattern generator (to create the vectors) and a signature register (to accumulate the results). But there were two big gotchas. The signature register could not accumulate any unknowns, and the number of vectors required, since they were random, was large. So then additional scan vectors from the tester were added, but since these had to address the most difficult challenges that the random vectors missed, it turned out this took almost as many vectors as a full test.

In 2003, test compression was invented and this was pivotal in ensuring that test did not, in fact, become more expensive than silicon.

In effect:

  • Test was too expensive for PPA...until test escapes were even more expensive
  • Test was getting more expensive, and when we had to, we innovated
  • Today almost all digital designs include scan/compression

One area where resilience is essential is automotive. Designs need to comply with ISO 26262 and, depending on the details, have to meet ASIL-A (no real impact) to ASIL-D (risk of death) requirements. LBIST came back to be used to take a core out of service, and test it, before returning it to service. But this took too long and CPUs were offline for too long.

arm automotive cores

LBIST is back to test cores, then bring it back up, as if it was powered down. But it took too long, we didn’t want CPUs to be offline too long. LBIST with observation during shift-cycles helped. For ASIC-D, you need even more, and triple redundancy (TCLS, triple-core lockstep) or DCLS (dual-core lockstep). These are concepts inherited into automotive from the aerospace industries...but cars don't cost as much as airplanes so the tradeoffs are a bit different.

Another challenge is transient failures, mostly alpha particles hitting the chip. There are various ways to address this such as resilient cells that recover. But it is a big challenge since we live on a radioactive planet bombarded by cosmic rays.

Teresa's overall message:

Resiliency is too expensive…until it’s not. And then we innovate.

Resilience is the next imperative in design.

Women in Engineering: Transforming the Innovation Paradigm

I attended the Women in Engineering panel, with the slightly odd title of Transforming the Innovation Paradigm. But actually, by the time I reached the pavilion, the title had changed to Real Advice for Today's Female Engineers, which was a much more accurate description of what ensued. The discussion was mostly based on the history and experience, both good and bad, of the panelists as women in the male-dominated world of engineering.

dac women in engineering panel

The panel consisted of (from right to left in the above picture):

  • Radhika Shankar, Synopsys
  • Geeta Pyne, Intuit
  • Sherry Hess, Cadence
  • Susanna Holt, Autodesk
  • Ann Steffora Mutscher, Semiconductor Engineering (the moderator)

 Ann hoped that the session would be inspiring and encouraging before asking each of the panelists to introduce themselves (from right to left).

Radhika is a group director at Synopsys, having been there for 20 years. She grew up in India in Chennai (fka Madras). Graduated with a bachelor's in engineering. She feels that what works early on in your career is that if you find a company that is technologically superior, with passionate people, and an open culture, then stay.

I know that people say if you move around a lot you can advance. But I stayed and it worked.

Geeta is chief architect for enterprise architecture at Intuit. She also grew up in India in Kolkata (fka Calcutta). Educated in computer science. She then started at the India Space Research Organization (ISRO) working on image processing in pre-cloud days. She feels that you need a sponsor who is going to be there for you and she wished she had had that.

Sherry is senior product marketing manager in our system analysis technology. She studied at CMU and was then recruited by Intel, which was a great place to learn. Then she went to a startup. What advice would she give her 20-year younger self? Build a network of people that will support you, especially having male allies. You have to believe in yourself and get over the impostor syndrome.

Susanna was a PhD mathematician and then joined a startup where there were ten other people, all men with PhDs. She admitted she suffered from the things that get ascribed to women: only speaking up when she was 100% sure she was right, never asked for anything, and so on.

Most of the time men were not holding me back but not supporting me either. I got promoted, and got recognition. I took up competitive sport in my spare time. This boost really helped me. This was all back in UK and then I relocated to the USA.

Ann: We have identified clearly what diversity is, and we know companies benefit financially from diversity, so what is it that is going to change things?

Susanna: I used to hate quotas, a proportion of women. People still to this day say I’ve only got the position because I’m a woman.

Sherry: The fact that we are having this discussion today and means we are more aware. That is the first step. California has put quotas for female board members, very positive change. IEEE has put out a women in engineering pledge. Maybe we need some quotas at the highest levels.

Geeta: First is awareness and then it comes. But metrics can always be gamed. Good to have corporate mandate from the top, but it needs to come from the base, too. It is about empowering people on the ground

Radhika: Don’t think it is someone else’s responsibility to fix. And make sure diverse interview panel is also there.

Q (from audience): How do we engage young women from an early age to believe first that they can do math, and that engineering and science is for them? Culturally that has been an issue. How do we encourage kids to think differently about their options in the future?

Geeta: Whether it is a girl or a boy should be irrelevant. Everyone should be exposed equally, and what can we do to help them learn the craft of math or science.

Sherry: This question is often asked, but having female role models that other women can see helps.

Q: It’s really good to increase diversity, but unless we change the systems we have they don’t feel included (maternity leave, flexible hours, etc). What are companies doing?

Susanna: Work from home has helped, it is now socially acceptable for men to be more involved. Sometimes things happen naturally (if we can regard Covid as natural).

Radhika: Let’s say people have taken time off, we have returnship opportunities. Synopsys encourages them to come back, and mentors them. [Cadence has a similar program.]

Q: Synopsys is my first industry job. How do I identify a mentor?

Sherry: Larger companies likely have a mentoring organization within the company. Cadence also has an onboarding buddy. Every six months, we have a mentoring cycle. Intel and others do a similar thing.

Susanna: We have a program too, but I think you should go outside of that. If you are in engineering, then look for someone in marketing, for example.

Radhika: Within the company choose somebody orthogonal with a different perspective.

Sherry: I thought a mentor was someone who would be with you for life, but it can also be short-term.

Q: Being in your respective companies, I’m sure you’ve dealt with sexism and racism. How come you have stuck to the career path that you have?

Susanna: I often ignored it because I couldn’t deal with it. I absorbed it and post-processed it later. So don’t do it that way! Find someone to talk to about it. Bottling up like I did is not good.

Geeta: Don’t let people make assumptions about you. If the company culture doesn’t allow it then declare who you are and why you have a seat at the table. If that's an issue then that is not the company for you.

Sherry: You will run into people with different characters, male or female.

Radhika: Just because someone is saying stuff, stick to your ground and stay true to yourself.

Q: Can you be more specific of a situation you dealt with and how you dealt with it?

Sherry: I was young and given the opportunity by a male ally to move to Europe and start a division. So I went. We acquired a company and one of the gentlemen at the company referred to me as “the little girl in charge”. I had to go to my manager to share it. It is not a situation that can continue. And he called him and he is no longer with the company. This was not appropriate corporate behavior.

Susanna: The big things are important but the little microaggressions get to you since they are not worth making a fuss about. The little things are harder to find someone to empathize with.

Q: When a workplace wants you to help promote diversity, how do you do that knowing that you are very much not understood? How do you advocate in a corporate setting for people who don’t know better and nudge them in the right direction without coming across as a jerk.

Radhika: it’s all about communication. Open honest communication.

Q: I come across as rude when I try and make a presence of myself in a male-dominated area. So how do you not get fired for that? That’s what I’m afraid of.

Geeta: I suffer from that too. But you have to know organization dynamics (better word than politics). It is what to say, when to say, and who you need to bring along with you too. You will learn over the years.

Sherry: if your personality is forthright, you need to channel who you are and you will find the right company. Plus you need to know when it is time to leave.

Susanna: Your form of presenting as a woman is a form of diversity. Just keep doing it!

Q: I say something and I'm ignored, then someone else (male) says the same thing and it is accepted.

Geeta: Sometimes you have to say explicitly “didn’t I just say that”.

Sherry: Having a mentor or partner in the room is great.

And at that point the panel had run out of time.

I took a picture of the audience. Not surprisingly, it was predominantly female. But I was far from the only male there!

women in engineering audience

 

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