Palladium Z2 Wins an ACE Award

A few years ago, the Palladium Z1 Enterprise Emulation Platform won an ACE award. Technically, it was the design team that won "Design Team of the Year". You can read what I wrote about it back then in my post ACE Awards: Palladium Z1 Team Is Design Team of the Year. This year, the Palladium Z2 platofm won its own ACE award, a 2021 ASPENCORE World Electronics Achievement Awards (WEAA). The award was actually presented in Shenzhen this evening (weirdly, due to time zones, just before this post went live). Shenzhen is just over the border from Hong Kong, and when I say just over the border, I mean it. The Shenzhen train station is literally over the river that is the border between the two countries. If you don't take the through train, you can just get the metro to the last station in Hong Kong, walk over the bridge, and you are in China. Of course, you need to do all the paperwork and passport stuff to get over the bridge.

Palladium Z2 is the next generation of emulation hardware. The Palladium product line is built around custom chips that our design team creates (with Cadence tools, of course). We often talk about Palladium and Protium together as the "Dynamic Duo". Protium is FPGA based so the heart of the product comes from Xilinx. But Palladium is "all our own work" with a custom chip. We announced the new versions of both products in April this year. You can read more in my post Dynamic Duo 2: The Sequel.

So how great is Palladium Z2? Roughly twice as good as Palladium Z1.

• Scales from 8 million gates to 18.4 billion gates
• 1.5X higher performance on emulation than Palladium Z1
• 10X faster waveform generation
• 2X deeper debug trace depth
• 2X faster memory dump and debug upload
• 2X higher bandwidth to the host workstation
• Higher power density by 50%, so lower operating costs
• Up to 144 concurrent users per rack, with advanced job re-allocation

Old emulators were boxes that sat beside an engineer's desk. But the Palladium Z1 and Z2 (and the Protium X1 and X2) are designed to go in a standard rack in a data center and be shared between lots of groups. The Palladium platform can share at the granularity of an individual SoC, the Protium platform on a per-FPGA basis. It is actually hard to talk about one half of the dynamic duo without the other. In some ways, the big thing is that they share the same compiler front-end, so it is straightforward to move a design from one system to the other. Palladium is ideal for debugging the chip. Protium is more oriented to debugging the software load. Nobody is going to tape out a chip these days without booting the operating system, and that is far too slow using Xcelium (or any other RTL simulator).

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