RISC-V Summit Day 2: Krste, Android

My first post about the recent RISC-V Summit appeared last week: RISC-V Summit 2022. That covered Calista's keynote, some of Qualcomm's keynote, and Lip-Bu Tan's keynote.

Krste Asanovic

The second day of the recent RISC-V Summit started with Krste Asonovic's State of the RISC-V Union. Krste was the leader of the team that invented the RISC-V ISA at UC Berkeley, where he is a professor of EECS. But he is also the chairman of the RISC-V foundation.

Krste opened with basically the same slide as Calista had opened the day before. RISC-V will have the best processors and the best ecosystem, and as a result, RiSC-V is inevitable. He drew an analogy with networking. Back in the day, there were DECnet, IBM Token Ring, AppleTalk, ARCNET, FDDI, and more. Now, everything is Ethernet. This is driven by the fact that the industry wants an open standard business model. Now, the industry wants an open standard ISA business model, and this is what RISC-V is delivering. And it is a one-way street: once you go to a high-quality open standard, you never go back to a proprietary single-source standard.

RISC-V will have the best processors because of competition spurring innovation, with a broad portfolio of processors serving specific niches created by specialist vendors. As a result, RISC-V will have the best PPA at each design point: the highest performance, lowest power, and smallest area.

Up until now, most RISC-V processors have been at the low end for embedded applications. Krste said he's had to bite his tongue when people said that there were no high-end processors since he knew about lots of projects that were in flight but which he was not allowed to talk about. Some are on the chart above, and many of those companies presented at the Summit. It just takes longer to design and bring to market a superscalar out-of-order vector-capable core.

One advantage RISC-V has compared to other ISAs is that it is starting late. With simple and modular extensions, it has lower area/power than other ISAs (plus reduced dynamic code size, a compare+branch instruction, and no complex instructions). As a clean sheet design, it avoids legacy warts. There is no limit to performance levels, and as a result, it will surpass other architectures quickly. Of course, the ISA needs to be kept clean in the future so that it avoids building up its own legacy warts.

Today, a typical SoC has many processors, with many different ISAs, often with comparatively poor ecosystem support, such as compilers and debuggers. RISC-V can handle all of those specialized applications, such as radio and audio DSPs, power management, image processing, radios, and more. "All your cores are belong to us" as his slide was titled (the phrase is a play on "All your base are belong to us" which is a badly translated phrase from the 1991 Sega implementation of the Japanese video game Zero Wing).

RISC-V has the largest number of players in its ecosystem, and that will only increase as all cores in a system become RISC-V. Software wants to run on the best hardware, and RISC-V will have the best processors. At the high end, as I said above, the long-running developments are coming to market now.

Krste wrapped up with his first slide redux that RISC-V is inevitable and will displace all other ISAs eventually. As Krste said when I first saw him talk about RISC-V back in 2016:

Our modest goal is to become the industry standard for all computing devices.

That is looking a lot more plausible than it did back then.

Lars Bergstrom

Krste was followed by Google's Lars Bergstrom, talking about The Android Open Source Project and RISC-V. One thing I didn't know is that Android was originally created as an operating system for cameras. Of course, it is most well-known as an operating system for smartphones, although it also runs on tablets, watches, cars, and streaming devices.

The numbers are huge: over 24,000 different devices, over a million apps and over 3B users. And contrary to some people's belief, zero Google applications are required to use Android.

The initial status of the RISC-V version of the Android Open Source Project (AOSP) is shown in the above table. One thing that Lars emphasized is that it is 64-bit only, and there are no plans to support 32-bit.

What there are plans for are shown in the above slide.

More from the RISC-V Summit in the New Year.

 

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