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Community Blogs Breakfast Bytes > RISC-V State of the Universe
Paul McLellan
Paul McLellan

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RISC-V State of the Universe

16 Sep 2020 • 5 minute read

  A couple of weeks ago was the RISC-V Global Forum. This was truly global, in that it started at midnight California time and ran for 18 hours until 8:00pm the following evening, with people presenting from their living rooms all over the world. Presentations were available for replay, so it's not quite as insane as it sounds. The keynotes were grouped into three blocks, one to open the conference with a focus on Asia and Europe (where it was not the middle of the night), then a second one starting at 8:00am California time, and then finally a closing block focused on finance and investment the final evening.

I'll cover a couple of these today and next week:

  • Krste Asanovic on The State of the Union: Krste is the Chairman of the board of RISC-V International but, perhaps more importantly, led the team that developed the original RISC-V ISA at Berkeley a decade ago.
  • Dave Patterson on The First Decade of RISC-V: A Worldwide Phenomenon: Dave, as you probably know, developed the original RISC (now called RISC-I) and another three generations after that.

I'm not going to cover the background to RISC-V today. If you don't know it, and want to get up to speed, then see my previous posts:

  • RISC-V — Instruction Sets Want to Be Free
  • RISC-V Summit Preview: Pascal or Linux?
  • What's Happening in RISC-V Land?

For more about Krste, seem my previous posts, in addition to the posts above about RISC-V:

  • Accelerating AI: Past... and Present and Future

Later, in a future post, I'll also cover the European Processor Initiative (EPI). Despite having a European background (brought up in UK, lived in France for over five years), I'm embarrassed to admit that I'd never heard of this. In my defense, it is quite recent. Their goal is to be the "European Intel." To be honest, I'm skeptical about programs like this. A decade ago there was Qaero, which attempted to be the "European Google". But, as a counterexample, there's no denying that Airbus is the "European Boeing".

There was also a presentation on the CHIPS Alliance (which is a cute acronym for Common Hardware for Interfaces, Processors, and Systems). However, in many ways, this was a trailer for a workshop that it is presenting on September 17. I will attend that workshop and discuss it at some point in the next week or two. Here is the link to attend (free).

Krste Asanović

It is ten years since Krste and a couple of graduate students decided to build their own ISA since they wanted to do research into computer architecture, and the other ISAs worth considering (Arm and x86) were both too complicated and came with too much legal encumbrance for them to build their own chips. After five years, the RISC-V foundation was created.

So, current status ten years later? As Krste put it:

It is a clean sweep in academia and research

There's actually an amusing anecdote about this since they never really pushed it out to other universities, they just put the materials on their website, as is typical in academia. The first inkling that they had that this might be bigger than they thought was when other researchers and universities complained to them that they kept making changes to the ISA and would they please not do that. It was a bit like that remark attributed to Oscar Wilde that "the only thing worse than being talked about is not being talked about". Instead of having an ISA that nobody was talking about. Suddenly they had an ISA that everyone was talking about.

There are still lots of gaps in the ecosystem, but generally when there's a gap somebody is working on it. The slide above gives a summary of the existing hardware and software ecosystem. It is worth emphasizing that just the RISC-V ISA is guaranteed to be open. There are open-source cores, but RISC-V is not "a core". Anyone can take the ISA and build a core, which might be open-source (bottom left above), or commercial IP (licensable), or completely in-house (NVIDIA's security processor is RISC-V based but you can't license it).

The original goals of RISC-V (10 years ago) were simplicity:

  • Build an efficient, extensible ISA for our research into domain-specific processors
  • Don't bake in technology assumption or microarchitecture (nor the privileged instruction set)
  • Easy to document, build, teach, modify
  • No barriers to sharing with colleagues
  • Support standard compiler toolchain (gcc) and OS (Linux)

There were also a couple of explicit non-goals:

  • They set out to create a "pretty boring" RISC design, not some VLIW or other specialized ISA
  • There was no plan to take over the world

Once it seemed that the iSA was developing a life of its own, the RISC-V Foundation was created. It's initial goals were:

  • Provide a central, stable home for the ISA spec
    • Get industry on board
    • Prevent fragmentation
  • Enable broader participation in the standard
    • But prevent industry hijacking
  • Build a unified community to promote the ISA

There were some explicit non-goals here, too:

  • No endorsement of cores, even open-source ones
    • Focus on compliance testing
  • No significant central engineering resources

So today, what do people most want from RISC-V? They want to change the licensing business model but not change anything else about how they operate. That is they want a free and open (non-proprietary) ISA that runs all existing software and fits into SoC designs.

But you have to take into account that most people do not care about ISAs. Even Krste admits that he doesn't care (or even know) what ISA runs in his microwave or noise-canceling headphones. Users only care about ISAs when it breaks things (Windows on non-x86 platforms, Android on non-Arm). Krste didn't mention it today, but when I first saw him talk about ISAs, he pointed out the investment that Intel has made to (unsuccessfully) get into mobile, or that Arm has made to (marginally successfully) get into data centers. This is due to having the wrong ISAs.

So the priorities have changed over time. When they started it was about simplicity and driven by computer architecture. Now, it is:

  1. Run all the software
  2. Be feature complete (see #1)
  3. Be stable (see #1)
  4. Support innovation (conflicts with #1, #2, and #3)

So now it is a software-driven project. Krste went into more details on each of these.

But one thing he emphasized is that:

while new initiatives and new areas are wonderful, we have to prioritize and finish the things we started... in particular to streamline standards and provide focus.

So Krste's summary slide on the state of RISC-V today is above. It is almost the opposite of Facebook's "move fast and break things". Continue to move fast but don't break anything.  Once things are working they should work forever.

You can see Krste's whole presentation (23 minutes):

Tomorrow

Next up, Dave Patterson on The First Decade of RISC-V: A Worldwide Phenomenon.

 

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