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Community Blogs Breakfast Bytes > The Systems Designer's Guide to...Systems Analysis
Paul McLellan
Paul McLellan

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Thermal Analysis

The Systems Designer's Guide to...Systems Analysis

3 Aug 2021 • 5 minute read

 breakfast bytes logo There is a new book in the System Designer's Guide to... series, published by i.007e books. The book is written by Cadence's Brad Griffin and is titled System Analysis: Electromagnetic Interference and Thermal Analysis of Electronic Systems. Click here or on the image of the book to download it.

Who is Brad?

Brad Griffin is a product marketing group director in the System Analysis Group at Cadence Design Systems, Inc. He has over 25 years’ experience in electronics design technologies that enable the design and analysis of integrated circuit packaging and printed circuit board systems for high-performance applications such as data centers, 5G, WiFi6, and 3D-IC. His career in EDA began with Camarillo, CA startup Quad Design where, through acquisitions and spinouts, he was part of Viewlogic, Synopsys, Innoveda, and Mentor Graphics. Griffin converted from engineering to business at the turn of the century and has been driving the successful growth of Cadence's signal and power analysis-focused solutions since 2003.

The book opens by looking at the five big trends driving electronics, and thus semiconductors and EDA. I've written about these before so I'll just point you to my two posts:

  • The Five Waves: AI, 5G, Cars, Clouds, IoT
  • Four More Waves: 5G, Cars, Clouds, IoT

Certainly AI, 5G, automotive, and hyperscale datacenters all involve high performance leading to signal integrity and analysis challenges, and potential thermal issues. IoT is lower performance, but almost always involves radios, and often involves challengingly small enclosures without fans or even heatsinks. In the words of the opening paragraph to chapter 1 of the book:

System designers for 5G, automotive, high-performance computing (HPC), IoT, and other advanced applications have been facing growing challenges in EM interference and thermal issues. These are prevalent in all electronic devices. Data centers play a key role in this high-performance computing (HPC) era, and EMI/thermal issues have a huge impact on the performance of data centers. This book explains scenarios and issues based on the context of data center electronic systems.

One major trend over the last twenty years has been the transition from relatively low-speed parallel interfaces to high-speed serial interfaces. This has been driven by a number of factors, two major ones being the switch from 32 to 64 bits (or more) for many buses, doubling the number of pins required for a parallel interface, and just a general lack of pins as the size of designs goes up, driven by Moore's Law, and so the number of pins goes up as a function of the logarithm of the design size—so increasing slowly, but increasing nevertheless. High-speed interfaces can be very fast. In another paragraph from the book:

 The quantity of data that must be processed at the edge nodes and the data centers is massive. Data centers require data transmission rates as high as 112Gbps. Such high speeds can be achieved only by using pulse amplitude modulation 4-level (PAM4) signaling. The 112G Long Reach (LR) and XSR eXtreme Short Reach (XSR) Serializer/Deserializer (SerDes) are designed for next-generation data center SoCs. Due to the high-bandwidth, high-speed data transmission behavior, the power consumption of every design part must be reviewed carefully. Designs must be implemented with pattern-based power optimization to save both the switching and internal power of each stage. To keep up with the growth in data and computational complexity, new approaches to accelerating applications and multiple servers using shared data storage must be explored.

To put 112G signaling into perspective, light travels a foot in a nanosecond (actually 10.8"). So light travels just a tenth of an inch in the time it takes to transmit one bit—yes, there are bits going into the wire before many of the previous bits have emerged. This sort of transmission requires extensive equalization to compensate for the characteristics of the channel, changes in temperature, and process corners of the chips involved. Notice that electrical effects and thermal effects affect each other, meaning that analysis of a system has to take both into accounts.

 Another challenge is advanced packaging using chiplets, putting more than one die inside the same package. The same issues arise at a smaller scale with the connections between the chiplets, known as D2D for die-to-die.

You may have heard that Moore's Law is dead, or slowing. For some aspects of each node that is true, but speeds and densities continue to increase, and power/thermal is always a challenge.

Device geometries have shrunk from hundreds of nanometers to a few nanometers. ICs produced at smaller technology nodes dramatically improve the end-user products, but to make the best use of smaller die, the packages or modules that house these dies must also be smaller. More devices packed more tightly together in smaller packages increase the coupling between these devices, and a greater focus on EM analysis is needed to quantify and optimize the effects the physical layout has on the electrical design.

Note that there are challenges at all levels: chips/chiplets, packages, boards, connectors, cables, backplanes, network cables, and anywhere the signals have to go.

To keep the book focused on the issues and challenges, it is not specifically about Cadence products. For example, the last chapter of the book is:

Cadence works on delivering algorithms that operate on unimaginably huge amounts of data, scaling algorithms to be massively parallel in the cloud, and delivering and supporting software in an enterprise environment. This approach to technology is in several products, enabling them to scale to large numbers of processors.

Learn More

I'm not so coy about mentioning individual products that address these system analysis problems. Let me point you at previous Breakfast Bytes posts:

  • Bringing Clarity to System Analysis
  • Celsius: Thermal and Electrical Analysis Together at Last
  • Under the Hood of Clarity and Celsius Solvers
  • Bringing Clarity to the Cloud
  • Bringing Clarity of Signal to High-Performance Connector Design
  • Electromagnetic Compliance: Anechoic Chamber Not Required
  • Announcing Sigrity X
  • Clarity, Sigrity, EMX, and AWR: So Many EM Solvers to Choose From…

 All of these posts cover some of the analysis tools in our portfolio, and direct you to the product pages if you want to take a deeper dive. There is also a smaller 10-page second book, The Cadence Electronic System Design Solutions Guide that gives an overview of how all these tools fit together to address the most demanding electrical and thermal analysis challenges. You can download it for free.

Download the Book

You can download the book for free on the i007books website from the book's webpage.

 

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