TSMC's Fab Plans, and More

The TSMC Technology Symposium took place recently. I grouped all the process and packaging roadmap into my previous post TSMC Technology Symposium 2018. Today I'll look at the rest of what was presented in the morning. Subsequently I'll put together a post that has the highlights from the afternoon sessions on Mobile & HPC, Advanced Packaging, IoT, and Automotive.

Opening Keynote

The opening keynote was given by CC Wei, currently co-CEO of TSMC, and from June CEO (without the co- bit). He pointed out that the big drivers looking forward for the next few years are AI and 5G.

AI was "a research topic when I was in college." That was a long, long, long, long time ago ("each long is about a decade"). But now there were over 300M smartphones with neural network capabilities shipped in 2017. There has been 4X growth in AI accelerators in the datacenter since 2016. They are expected to be 800K units this year, up from 200K in 2016.

In automotive, we have level 3 autonomy for the first time in a commercially available car. Of course, there are many, many self-driving car projects making a lot of progress.

As to IoT, 700M people used a personal assistant daily in 2017 ("I'm not one of them...so there's still room to grow").

Some numbers about TSMC. R&D for last year was $2.6B, with an end-of-year headcount of 6,145. They grew R&D by 20% even though the business did not grow that much.

TSMC is always the first to market at 28, 16, and 10. Today 7 is in volume production. 5 is on schedule for risk-production in the first half of next year.

In 2017, TSMC manufactured 11M 12" equivalent wafers with the best yield and the best cycle time in the industry. To make that happen, they had a capex for 2017 of $10.9B, and estimate for 2018 is to grow that to $11.5-$12B.

Cliff Hou

Cliff Hou talked about TSMC's design enablement platforms. Since most of his presentation was tables showing the availability of flows, IP, and libraries, and since they don't give us those tables, it is impossible for me to do much more than give you the biggest of big pictures.

N7 is basically done. Get designing. You can tape out and manufacture whenever you are ready. N7+ (N7 with EUV and some tweaks) is ready for design starts, manufacturing next year.

N5 ecosystem development is on-track and ready for early design starts now.

12FFC portfolio has all been pulled from 16 except the highest speed SerDes available at the end of this year.

16FFC automotive platform is ready and in production. N7 automotive platform (extended from 16FFC) has EDA certified, foundation IP ready August 2018, other interfaces IP by 2Q 2019 (grade-2 certified).

N22ULP: All PDKs ready Q3 this year. Easy porting from N28HPC+, same design rules, 10% shrink. N22ULL has ultra-low-leakage SRAM and standard cells. PDK and foundation IP will be ready Q4 2018 (basically runs 1Q after ULP)

CoWoS, InFO, WoW are available now, WoW using "hybrid bonding". Note that this was the only mention of WoW in the entire day of presentations despite us (and other TSMC partners) making announcements about it that day. InFO_MS to allow integration directly with HBM will be September 2018. SoIC (System-on-Integrated-Chips) will be 2019 (tool readiness issue).

Cliff's summary:

• N7 in use
• N5 ready for early designs
• N16/N12FFC in production
• automotive designs in production at 16 and being extended to 7 with 2H 2018 availability
• N22 ULP/ULL has same design rules as 28, IP will be ready Q4 2018
• 3DIC extended to WoW and InFO_MS this year, and to SoIC in 2019

JK Wang

JK Wang is the VP of operations for 300mm fabs, and he is an old-timer. He has been at TSMC since its foundation 31 years ago in 1987. If you want to see a presentation from that era then see my post TSMC 30 Years Ago Today. In the descriptions below p1 means "phase 1" and so on. These are what any other company calls a fab. TSMC gets a large piece of land, and builds several phases on them over a period of years.

TSMC has 3 new gigafabs:

• Gigafab 15: p5, p6, p7 ramping
• Gigafab 18 (Tainan): p1, p2, p3 under construction (next to fab 14). 5nm production scheduled to begin here in 2020.
• Fab 16 (Nanjing): ramping. Starting with 20Kwpm in 16nm, will have two phases, each 40wpm at capacity. Equipment was moved in last September, first wafers out in April, ahead of plan

JK had some beautiful aerial photographs of the fabs, especially the Nanjing fab in the snow, which also has some of the flavor of the Apple campus, with a circular visitor building, a square office building, and the fab itself another big circle. But they don't hand them out and the best I can find online is a model of the Nanjing fab from the architects.

TSMC capacity increase YoY from 2017 to 2018E is up 9%, to 12M 12" equivalent wafers. Around 35% of total capacity is 28nm or below. Capacity in 10/7nm has doubled from 2017 to 2018, and will increase by another 50% by 2019. Most will be upgraded to 7nm and capacity will be 1.1M wafers per year by the end of 2019. CAGR is about 30% in advanced nodes (28nm and below).

Capacity in specialty technology has gone to 2.2X today what it was in 2013. Mature node fabs get upgraded for specialty. There will be about 4.5M 12" wafers in 2018. The switch is quite large, with pure logic only 40% of old nodes, and specialty being 60%.

The volume ramps are insane at TSMC. JK showed a graph with N40 being somewhat leisurely, then N28 being much more aggressive. But since then their fab ramps are almost vertical. From a standing start the volume ramps from zero to peak capacity in just 3 months. The same steep ramp will be applied to 7nm later this year.

They are leveraging big-data infrastructure to drive quality. Each gigafab has 200K wpm capacity. There are thousands of incoming materials, 100Ks of process SPC, millions of FDC control charts, 50K recipes, 20M tool setting parameters. It all needs to be correlated.

It was not JK Wang that said it, but Cheng-Ming Lin later in the day, but it fits in here:

We never shut down a fab. We returned a rented fab to the government once.

This may not matter that much in mobile and HPC, where they live on the bleeding edge and product lifetimes are a few years. At the other end of the scale are automotive and aerospace, which might require spare parts 15 or 20 years after first shipment. For them, that is a big deal.

Next

This blog and the previous one cover the morning of the TSMC Tech Symposium. I will have highlights from the afternoon in another post.

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