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Virtuoso ICADV12.3
Analog Design Environment
ICADV12.3
Routing
IC 6.1
Mixed-Signal
Virtuoso
Schematic Editor
IC6.1.7
Virtuoso IC6.1.7
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ADE Assembler

Virtuoso IC6.1.7 ISR23 and ICADV12.3 ISR23 Now Available

20 Dec 2018 • 2 minute read

The IC6.1.7 ISR23 and ICADV12.3 ISR23 production releases are now available for download at Cadence Downloads.

  • IC6.1.7 ISR23
  • ICADV12.3 ISR23

For information on supported platforms, compatibility with other Cadence tools, and details of issues resolved in each release, see:

  • IC6.1.7 ISR23 README
  • ICADV12.3 ISR23 README

The links above are functional at the time of publishing. If you encounter any links that are now obsolete, visit https://downloads.cadence.com and select the release name you are interested in to access the related files. 

Here is a listing of some of the important updates made to IC6.1.7 ISR and ICADV12.3 ISR over the last few releases:

  • Faster Netlist Generation for Analog Components in a Mixed-Signal Design (from ISR22) 
    Use the new Create spectre subckt for extracted view check box to generate an optimized netlist for analog components in a mixed-signal design. Not only does the new option improve the netlisting performance but it also skips the mixed-signal elaboration step for these cellviews, saving the overall simulator processing time.

  • Default Application to Open a Saved ADE State (from ISR21)
    Specify the default application where you want to open a saved ADE state. Use these while migrating to ADE Explorer or ADE Assembler.

  • Wildcard Syntax for Saving PCells in Netlist (from ISR21)
    Use wildcards to specify PCell operating point parameters on the Save Options form.

For more details on these and all the other new and enhanced features introduced in this release, see:

  • IC6.1.7 What's New
  • ICADV12.3 What's New 

Contact Us

Please send questions and feedback to virtuoso_rm@cadence.com.

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Virtuoso Release Team

 


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