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Virtuoso Meets Maxwell: Package PDK in Virtuoso! How Is It Even Possible? (Part 2)

18 Nov 2019 • 4 minute read

'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso® RF Solution and Virtuoso MultiTech. So, how does Virtuoso meet Maxwell? Now, Virtuoso platform supports RF designs, and the RF designers measure the physical and radiation effects by using the Maxwell's equations. In addition to providing insights into the useful software enhancements, this series broadcasts the voices of different bloggers and experts about their knowledge and experience of various tools in the Virtuoso IC-Packaging world along with the nuances of RF, microwave, and high frequency designs. Watch out for our posts on Mondays.

Alright… I’m back again to amuse you with another part on how to set up Package PDK in the Virtuoso platform. In my previous blog, I showed how any component alongside with package/board technology and I hope you are applying what you have learned in your design flow on a daily basis.

Today I’m going to highlight how to create the Embedded/Customized (such as spiral inductors and couplers) components libraries. Of course, there are many ways that these type of components can be created, but in this section we are going to focus more on how these components can be created in Allegro/SiP Layout and get imported in Virtuoso. There are five known methods provided by Cadence SPB team on how you can create an embedded component inside Allegro/SiP Layout:

  1. Manually Create Laminate Symbols from GDS (Geometric Data Stream)
  2. Package Symbol Wizard to Create Laminate RF Symbols from GDS
  3. Manually Create Laminate Symbols from Sub-Drawing
  4. Manually Create Laminate Symbols Directly in SiP Package Symbol Editor
  5. Manually Create Symbols from Existing RF Circuitry in SiP Layout

Let’s take a closer look at each method, shall we?

Step 1- Method #1: you can manually create laminate symbols from GDS by going through the following steps in the Symbol Editor:

  1. Import Techfile.
  2. Import GDS file.
  3. Add the Refdes placeholder.
  4. Add pins.
  5. Add vias (if necessary).
  6. Add properties (if necessary):
    • Void_Same_Net
    • Dyn_Clearance_Oversize
  7. Save.

Here is an example of a Ground Shunt Inductor:

Step 1- Method #2: you can use the Package Symbol Wizard to create laminate RF symbols from GDS by going through the following steps:

  

Step 1- Method #3: you can manually create laminate symbols from a Sub-Drawing by going through the following steps:

  1. In SiP Layout Editor:
    1. Export Sub-Drawing of RF circuit.
  2. In SiP Package Symbol Editor:
    1. Import Techfile.
    2. Import Sub-Drawing file.
    3. Add the Refdes placeholder.
    4. Add pins.
    5. Add properties (if necessary):
      • Void_Same_Net
      • Dyn_Clearance_Oversize
    6. Save.

 

Step 1- Method #4: you can manually create laminate symbols directly in SiP Package Symbol Editor by simply using the drawing capabilities within the tool stated below:

  1. Import Techfile.
  2. Route/Draw circuit.
  3. Add Refdes placeholder.
  4. Add pins.
  5. Add properties (if necessary):
    • Void_Same_Net
    • Dyn_Clearance_Oversize
  6. Save.

 

Step 1- Method #5: you can manually create pseudo symbols from existing RF circuitry in SiP Layout in SiP Layout Editor:

  1. Set Mode to Symbol Edit.
  2. Add Component.
  3. Define symbol type & boundary.
  4. Add pins.

Note that This method only adds pins to existing RF circuit pattern and not recommended if RF circuit pattern is required for symbol.

Now that we have a better understanding of how embedded components are created in Allegro/SiP, let’s move on to importing these symbols to Virtuoso. Just showed in my previous blog, any component alongside with package/board technology can be imported directly from SiP to Virtuoso. Let’s go through this spiral inductor example “coil_ind” that was created in SiP through method #4:

 

Step 2- From the Command Interpreter Window (CIW) go to File >> Import >> From Allegro…

 

Step 3- Import Allegro File form opens, now we need to select the Allegro/SiP Layout file coil_ind.sip and then we click on OK to start translation and exit the form.

   

Step 4- Check the CIW to track the translation, once the translation is finished, we can take a closer look at what got imported by checking the Library Manager (in the CIW, click Tools >> Library Manager). In this example, we can see a library called coil_ind containing the following cells:

 

To conclude this episode, there are currently five methods that you can use to create an embedded component inside the Allegro/SiP Layout. Regardless of the method, the embedded component can be imported into Virtuoso and used in your system level design.

Related Resources

  • Virtuoso RF Solution
  • What’s New in Virtuoso (ICADVM18.1 Only)


For more information on Cadence circuit design products and services, visit www.cadence.com.

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For any questions, general feedback, or even if you want to suggest a future blog topic, write to custom_ic_blogs@cadence.com.

About Virtuoso Meets Maxwell

Virtuoso Meets Maxwell series includes posts about the next-generation die, package, and board design flow with a focus on reinventing and optimizing the design process to ensure that the designer remains a designer! Keep watching!

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Sanam Vakili



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