Virtuoso Meets Maxwell: Layered Electromagnetic Modeling For Sufficient Accuracy

'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso RF Solution and Virtuoso MultiTech. So, how does Virtuoso meets Maxwell? Now, the Virtuoso platform supports RF designs, and the RF designers measure the physical and radiation effects by using the Maxwell's equations. In addition to providing insights into the useful software enhancements, this series broadcasts the voices of different bloggers and experts about their knowledge and experience of various tools in the Virtuoso IC-Packaging world along with the nuances of RF, microwave, and high frequency designs. Watch out for our posts on Mondays.

Fast growing markets like 5G, automotive, and IoT are driving the development of advanced semiconductor technologies and silicon-integrated circuits. In particular, the high cutoff frequency of advanced CMOS and Silicon-Germanium (SiGe) bipolar devices allow the integration of millimeter-wave circuits with good high-frequency performance and high integration level at moderate mask costs.

Parasitic Extraction vs Electromagnetic Simulation

Analog and RFICs form the hardware backbone of these applications and contain a variety of different interconnect and passive component geometries. At high frequencies, parasitic effects of these layout geometries may have a significant impact on circuit performance and need to be accurately modeled.

Multiple electromagnetic (EM) extraction technologies are required to ensure sufficient accuracy at reasonable simulation run time for all layout structures. Complex networks of short traces might be best modeled using quasi-static techniques for parasitic extraction, while electrically longer structures or passive on-chip components, such as spiral inductors or transformers require 3DEM simulation to capture full-wave behavior.

Using the Virtuoso RF Solution, an RFIC designer can take advantage of several different EM simulation techniques to meet her requirements.

Transistor-Level Parasitic Extraction Solution

Electrically short nets are traditionally modeled with discrete resistance and capacitance circuit elements using a quasi-static approximation of the Maxwell’s equations to extract parasitic effects. The Pegasus Quantus Transistor-Level flow allows you to create a technology file (qrcTechFile) for each process corner containing a suite of 2D and 3D capacitance models as well as resistivity information associated with interconnects for that process.

Pegasus Verification System is a cloud-ready physical verification signoff solution. Based on technology-specific runsets provided by foundries Pegasus LVS extracts a layout netlist and compares it with the schematic netlist. Pegasus verification creates all necessary files for a Quantus extraction to follow.

Quantus Extraction Solution performs post-layout parasitic extraction of resistive, capacitive, and inductive effects in designed devices and wiring interconnects of digital, analog, and RF designs.

Quantus solution supports several output formats, such as SPICE, transistor-level DSPF, or Quantus Smart View. Smart View is the enhanced version of extracted view output showing significant improvements with respect to runtime, memory usage, and netlist size.

Electromagnetic Simulation

Depending on the electrical length of the structure, critical portions of the RF interconnect network may not be adequately modeled through parasitic extraction, requiring the designer to apply full-wave EM simulation. Using the Virtuoso RF Solution, you will have the choice between several EM solvers. While Clarity is a 3D Finite-Element-Method (FEM) solver, the EMX and AXIEM solvers are based on the Method of Moments (MoM) algorithm. The tight integration of these solvers into the Virtuoso Layout Suite EXL platform allows you to select the appropriate extraction method for each portion of the layout and seamlessly stitch together the different results.

To combine EM extraction of RF critical parts with Quantus parasitic extraction, you use the Electromagnetic Solver Assistant as the cockpit for defining your EM model.

1. First, create a new model and select EMX or AXIEM as Simulator. Notice that the EM Solver Assistant allows you to seamlessly switch between multiple solvers. For planer layout geometries as you find them in RFICs, MoM solvers are an excellent choice to optimize the accuracy versus run time tradeoff. In MoM solvers only the metal is meshed leading to a significantly lower number of unknowns.

2. Next, you pick components and nets and add them to your model. You can select them in the schematic, the Navigator Assistant, or the Layout canvas. There is no need to modify your golden layout or schematic, nor do you need to pre-partition the design in active and passive blocks.

3. Switch to the Ports tab to automatically generate your ports, before you click on Mesh and Simulate to launch EM extraction.

4. Once meshing has finished and while EMX is still running, you can start the 3D Mesh Viewer to analyze the mesh. The mesh will give you an indication of the accuracy of the results. Notice that the metal layers in the 3D viewer have the same color scheme as used in Virtuoso layout.

After the simulation has finished, view the Results tab that gives you the access to the extracted S-parameter file.

Layered Extraction using Quantus RC Extraction and EMX EM Simulation

After generating an EM model,

1. Run the PVS Quantus flow to create a smart view.

2. Once Quantus has finished, switch back to the EM Solver Assistant and click Create Extracted View.

3. In the Create Extracted View form, select the smartview as Reference View. The tight integration of the tools into the Virtuoso framework enables the automatic generation of a new smartview_sparam view and prevents parasitic effects from being counted twice. In this new view, all components and net parasitics that are a part of the EM model get replaced by EM-extracted S-parameters. No manual interaction is needed.

For post-layout circuit simulation, you will select this view in the Hierarchy Editor.

The EMX solver is a well-established best-in-class EM solver for RFICs. Its integration into the Virtuoso RF Solution, which just got released in Virtuoso 20.1 ISR15, provides the groundbreaking capabilities to ease the combination of parasitic extraction and EM modeling eliminating the risk of double counting.

How long did it take you to manually stitch the active and passive parts of your last RFIC design? And are you sure you didn’t miss or double count parasitic effects? Don’t you think layered extraction with the Quantus and EMX solvers to avoid these tedious and error-prone manual steps will speed-up your design cycle?

Look out for the Virtuoso EM Rapid Adoption Kit to guide you through the flow, and stay tuned to follow the exciting journey of Virtuoso RF Solution.

Claudia Roesch

Related Resources

For more information on Cadence circuit design products and services, visit www.cadence.com.

About Virtuoso Meets Maxwell

Virtuoso Meets Maxwell series includes posts about the next-generation die, package, and board design flow with a focus on reinventing and optimizing the design process to ensure that the designer remains a designer! Keep watching!

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