Virtuoso Meets Maxwell: Playing with Ports During Electromagnetic Simulation

‘Virtuoso Meets Maxwell’ is a blog series that explores the Virtuoso RF and Multi-Technology Solutions. So, how does Virtuoso meet Maxwell? This is done by combining the industry leader in custom design, Virtuoso Studio, with powerful EM solvers that address a wide range of design needs. This series features the voices of Cadence experts who share their experience with various tools in the Virtuoso IC and Allegro Packaging world, along with the nuances of RF, microwave, and high-frequency designs. Watch for our posts on Mondays.

The goal of any electromagnetic simulator is to extract S-Parameters of the simulated system. To do this, some energy is injected in the structure and the amount of reflected energy calculated by the simulator allows to derive the S-Parameters. The energy is injected in the system through ports so that it is evident that the correct definition of ports is a key factor to determine the goodness of the results of an electromagnetic simulation.

Port definition in the EMX Planar 3D Solver in the Electromagnetic Solver assistant has already been described in this blog. We will start from that blog to add some additional information related to this topic and to let you better exploit the potential of such a solution.

Systems can be “charged” in different ways: even thinking about a simple integrated inductor, you can have two different scenarios.

• In the characterization phase, you might build a test chip with the structure to be measured on waver with Ground Signal Ground probes charging the structure;
• In the normal use, embedded in an RFIC, it is “charging” by the signal injected through the metal nets to which its terminals are connected.

For this reason, an electromagnetic solver as the EMX Planar 3D Solver offers you different kind of ports. The general rule behind the choice of an appropriate port to be used is “to mimic as much as possible what is happening in reality” (see Figure 1).

Figure 1: On the left, edge ports are defined. The charging happens through the left edge while on the right, internal ports are used because the charging happens "vertically" towards the center of the pad. The screenshot on the right refers to a layout shared by STMicroelectronics. More details can be found in this IEEE paper.

The EMX Planar 3D Solver can automatically identify where ports must be placed from Cadence pins placed in your layout. It allows you to choose between Edge or Internal ports.

While defining a port, it is important to remind that the excitation of the system is done by applying a voltage source to the port itself, while measuring the reflected current. A voltage source clearly needs a reference to which it is applied (it is a two-terminal device) and, at the same time, the current injected through the system by the voltage source needs to find a path to return back to the second terminal of the voltage source itself. Even in this case, the definition of each port reference is very important and must match as much as possible with what happens in reality.

By default, the ports are unreferenced, or implicit. This means that they are referred to an ideal ground plane below the substrate, which is not necessarily present in reality, If you want to take into account retardation effects, enabling the radiation mode, it is mandatory to identify a physical ground reference close to each port, unless you risk to get non-physical or non-causal S-Parameters.

Figure 2: On the left, P1 is defined as an unreferenced IC port. On the right, the same port, P1, is referred to the edge of the light blue metal1 internal ground plane below M3. In this second case, the return path of the current injected at P1 will be through the internal M1 ground plane.

When you are on the Ports tab of the Virtuoso Electromagnetic Solver Assistant, you are even asked for the definition of the N-Port Common Node field. What is it? It is a reference node and its definition is needed to allow for the Spectre simulation of a testbench including the S-Parameters extracted by the EMX Planar 3D Solver. So, such a node has no impact on the EM simulation results but it is needed to use them. In fact, once the EMX simulation is done and the Touchstone file is available, the following step consists of stitching these S-Parameters in the golden-schematic. This is done through the cfde_nport device from Virtuoso analogLib, which is automatically instantiated and linked to the Touchstone file. The file has a number of terminals equivalent to the number of ports defined in the simulation, plus an N-Port Common Node. The N-Port Common Node value specified in the Ports tab of the Virtuoso Electromagnetic Solver Assistant will be automatically connected to the terminal of the cfde_nport instance in the backannotated schematic. It is important to note that:

• If you do not put anything in the N-port Common Node field, the cfde_nport common node in the backannotated schematic will be connected to gnd!
• In the schematic-driven flow, any pin connected to that net does not require an electromagnetic port.

Figure 3: The net specified in the N-Port Common Node field is the one to which the reference terminal of the cfde_nport component is connected.

As already stated, ports are automatically defined looking at pins instantiated in your layout. It might happen that pins are used within the instance (for example a spiral inductor), and another pin is placed at the top level. Two overlapping ports are automatically grouped and only one port will be effectively used in the EM simulation.

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Enrico Sacchi

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