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'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso® RF Solution and Virtuoso MultiTech. So, how does Virtuoso meet Maxwell? Now, Virtuoso platform supports RF designs, and the RF designers measure the physical and radiation effects by using Maxwell's equations. In addition to providing insights into the useful software enhancements, this series broadcasts the voices of different bloggers and experts about their knowledge and experience of various tools in the Virtuoso IC-Packaging world, along with the nuances of RF, microwave, and high-frequency designs. Watch out for our posts on Mondays.

I have been involved in the Virtuoso RF Solution for the last four years. Most of the customers I work with have a SiP package already in progress. They often ask, "How do I get my SiP design into Virtuoso RF Solution?"  I am excited about new functionality in the latest ICADVM20.1 ISR25 release. It is a new GUI under the Tools menu called Enablement. This new GUI allows you to create a package technology file library and create a design library with a schematic view and layout view based on the SiP file. Let me walk you through the steps so you'll better understand.

In the CIW, use the menu pulldown Tools – Virtuoso Multi Technology – Enablement brings up the new GUI.

This opens a form where you can navigate to open a SiP file in step 1, specify the library for the technology information in step 2, and specify the library for the design in steps 3 and 4. Below is an example of the form filled out using our latest Enablement Rapid Adoption Kit (RAK) data available on support.cadence.com here.

After you click OK, the two libraries will be created. If you use the RAK database, the schematic and layout will look similar to the pictures below.

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This flow is more of a layout-driven schematic because we are using the SiP file to create the netlist and schematic symbols. But Cadence's philosophy is to be more schematic-driven layout. At this point, you should modify the schematic to drive the layout with respect to changes to components and netlist. One thing that should be noted is the instance that represents the die is not Virtuoso RF Solution compatible, which means if you try to launch Edit-in-Concert, it will fail because the schematic instance is not pointing to a Technology Independent Layout Pcell (TILP) representation. For this, we expect that you've already exported the die to create the die_footprints library. To create the die_footprints library, I recommend you read Deepti's blog on Export Die. You need to select the die instance in the schematic and remaster it with the instance symbol created from die export. But first, we recommend you to save the existing connectivity.

In the schematic view, use the pulldown menu Module – Connectivity – Save Connectivity.  This creates an ASCII file that can be edited if you want to update any of the connectivity like a spreadsheet. We will use this file to replace the connectivity when we remaster the die symbol.

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Now, we will select the die symbol and the stubs attached to it making note of the instance name.

You can delete what is selected and create a new instance pointing to the symbol in the die footprint library.  Again, I am using the RAK database for illustrations.

Instead of manually adding the label to the stubs on this new instance, you'll read the connectivity file we saved earlier using Module – Connectivity – Save Connectivity.

The last step is to Update Components and Nets in the layout view to replace the die instance in the layout from the SiP Layout Option with the TILP instance in the die footprint and therefore, making it Virtuoso RF Solution compatible. 

Subsequently, we can use Edit-in-Concert to view the die in the package and vice versa.

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Now that the package design is Virtuoso RF Solution compatible, I want to tell you about the next greatest enhancement to Virtuoso RF ISR25.  And this is the Fully Assisted Roundtrip Flow.

What is the advantage of the Assisted Flow? 

The assisted flow keeps and maintains all of the constraints and other data native to the SiP file while allowing updates from Virtuoso RF Solution to be incrementally updated to the original SiP file. Only changes made in Virtuoso RF Solution are updated to the SiP file. Whether it is a change in the die footprint, a netlist change, an added SMD component, or an edit to the wiring, only those changes are updated to the SiP file. 

So far, you have imported the SiP file with the new Enablement GUI. You have remastered the die symbol and layout with the exported die footprint data.  

The next step is to update the SiP file with these changes.

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Related Resources

For more information on Cadence circuit design products and services, visit www.cadence.com.

Kerry Judd

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About Virtuoso Meets Maxwell

Virtuoso Meets Maxwell series includes posts about the next-generation die, package, and board design flow with a focus on reinventing and optimizing the design process to ensure that the designer remains a designer! Keep watching! Subscribe to receive email notifications about our latest Custom IC Design blog posts.