• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. Analog/Custom Design
  3. Spectre Tech Tips: Handling Differential Matching Circuits…
timlow
timlow

Community Member

Blog Activity
Options
  • Subscribe by email
  • More
  • Cancel
CDNS - RequestDemo

Have a question? Need more information?

Contact Us
Circuit simulation
Spectre Circuit Simulator
Spectre X Simulator

Spectre Tech Tips: Handling Differential Matching Circuits in Spectre X

24 Feb 2023 • 2 minute read

 Differential matching circuits such as comparators require special handling of RC reduction for accuracy. By design, the differential pair of the comparator is closely matched such that any form of imbalance due to RC mismatch will lead to large differences. Thus, for any given differential pair, even a conservative setting can be problematic. The RC reduction applied on the “left” and “right” may vary based upon the predefined set tolerances. Therefore, it is always recommended that no RC reduction is performed on these types of circuits.

Small error % can lead to large inaccuracy

The efficiency of a comparator can be determined by its input offset voltage or the difference represented by a voltage source applied in series with one input of an ideal comparator. The differences in the input stage is the result of transistor imbalance and RC mismatch. Consequently, the output doesn't toggle when VIN+ = VIN-, as in the case of an ideal comparator, but the threshold level is shifted by the input offset value VIO as shown in Figure 1.

 

Figure 1: VIO is the input offset value

Preserve all nets that contribute to VIO

Spectre X by default detects postlayout content and enables RC reduction. This RC reduction may cause accuracy problems when applied to a comparator or similar differential design.

Nevertheless, Spectre X enables the user to customize RC reduction locally to a given net or block. This approach can be used to locally disable the reduction for all nets that contribute to VIO in the comparator.

Syntax:

opt1 options postlpreset=off +postlnets=[instance_of_comparator.*]  

Related Resources

  • Spectre Classic Simulator, Spectre Accelerated Parallel Simulator (APS), and Spectre Extensive Partitioning Simulator (XPS) User Guide
  • Introducing Spectre X

You may also contact your Cadence support AE for guidance.

 For more information on Cadence products and services, visit www.cadence.com.

 

About Spectre Tech Tips

Spectre Tech Tips is a blog series aimed at exploring the capabilities and potential of Spectre® circuit simulator. In addition to providing insight into the useful features and enhancements in Spectre, this series broadcasts the voice of different bloggers and experts, who share their knowledge and experience on all things related to Spectre. Select SUBSCRIBE to receive notifications about our latest blog posts.

Timothy Low


CDNS - RequestDemo

Try Cadence Software for your next design!

Free Trials

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information