Virtuosity: How to Run a Multi-Technology Simulation (MTS)?

31 May 2018 • 3 minute read

Are you looking for some hands-on experience with running multi-technology simulation in Virtuoso® ADE Explorer and Virtuoso® ADE Assembler?

In today’s fast-shrinking technology, we often have situations where we need to design custom IC system-in-packages (SiP). But, here comes the challenge – how to design these ICs using different technologies in a single design environment and analyze their responses when there are library name collisions along with the model name collisions.

Cadence offers you an effective solution to resolve this problem - Support for running Multi-Technology Simulation.

Virtuoso ADE Explorer, Virtuoso ADE Assembler, and Virtuoso® Analog Design Environment XL include the Multi-Technology Mode check box on the Choosing Simulator form, which you can select to enable a multi-technology simulation. You can then specify the MTS options using the MTS Options form that appears by right-clicking the test name in the Data Assistant and choosing MTS Options.

The Spectre® Circuit Simulator Platform is enhanced to parse the netlist to localize the device model at the level in which it is being included. In the Spectre netlist format, any information such as include and parameter statements defined inside a subckt definition will be treated as local, and will not be populated to the top level.

In order to run a simulation in multi-technology mode, your design must have a configuration view. This requirement makes it possible for you to configure MTS blocks from the Hierarchy Editor (HED).

Rapid Adoption Kit (RAK) Available Now!

If you’re interested in trying out the Multi-technology simulation flow, the Multi-Technology Simulation flow (MTS) in Assembler & Spectre Batch mode RAK will walk you through the flow with the help of a database. Click the link now to download the RAK. Once the RAK is open, click View Attachments to download the database, as shown in the figure below.

This RAK helps you perform the following tasks:

Enable Multi-Technology Mode in ADE
Set a Multi-Technology Simulation for particular blocks
Run a Multi-Technology Simulation in ADE Assembler
Run a Multi-Technology Simulation in Spectre batch mode

Just to give you a brief summary of what the RAK has in store for you – it includes a top-level schematic comprising of a chain of inverters. One of these inverters uses 45nm technology (45nm Inverter, I0) and the other 2 inverters use 180nm technology (180nm inverter, I1 and I9). Our goal is to create a testbench in the 180nm process and simulate the interface between the two circuits.

The picture below shows the design under test.

What is a Rapid Adoption Kit?

If you’re wondering what does a RAK mean, then we’d like to mention that RAK is a Rapid Adoption Kit that demonstrates how to use Virtuoso applications in your design flows. This kit contains design databases and instructions on how to run the design flow. It aims to bring you up to speed on the feature quickly.

Click here to open a list of available RAKs or visit Cadence Online Support and choose Resources – Rapid Adoption Kits.

Related Resources

For more information on Cadence circuit design products and services, visit www.cadence.com

About Virtuosity

Virtuosity has been our most viewed and admired blog series for a long time that has brought to fore some lesser known, yet very useful software and documentation improvements, and also shed light on some exciting new offerings in Virtuoso. We are now expanding the scope of this series by broadcasting the voice of different bloggers and experts, who would continue to preserve the legacy of Virtuosity, and try to give new dimensions to it by covering topics across the length and breadth of Virtuoso, and a lot more… Click Subscribe to visit the Subscription box at the top of the page in which you can submit your email address to receive notifications about our latest Virtuosity posts.

Happy Reading!

Priyanka