Virtuosity: The Top 3 Post-Layout Enhancements in Analog Design Environment

Today's blog highlights the latest enhancements to the post-layout flow. These enhancements address many of the long standing issues, such as mapping schematic and post-layout names, plotting terminal voltages and sweeping DSPF files. This blog is a part of the mini blog series that we are posting twice a week—Tuesday and Thursday—to cover the just-released features in Virtuoso®ADE Assembler, Virtuoso®ADE Explorer, and Virtuoso® Visualization and Analysis. Stay tuned for more such interesting blogs.

Have you ever wanted to sweep DSPF files across corners, plot terminal current and voltage and ensure that the simulator name maps correctly to the schematic name in Virtuoso® ADE Assembler and Virtuoso® ADE Explorer? If so, IC6.1.8 ISR3/ICADVM12.8 ISR3 will be the release for you.

I'll outline here how these long standing issues have been addressed.

Mapping Schematic and Post-Layout Names

DSPF files can be generated from many tools and as such, they can have many different formats. This has made it really hard to map the schematic to extracted names in ADE. Also, at times, you might have found after a post-layout simulation that selecting terminals or signals from the schematic in direct plot mode would not work, or that expressions you created for the schematic no longer work for the post-layout simulation. This could be due to the lack of mapping between the schematic and DSPF file.

Some examples include:

• Hierarchy delimiter mismatch (. or /) are commonly used
• Prefixes (such as X or M) are added to the DSPF
• Finger delimiter mismatch (@ or #) are commonly used
• Terminal mismatch (s or 1) are commonly used.

Now we can manually map the DSPF syntax to the schematic using the .simrc file and some settings. These settings are picked up when you netlist the design. The internal mapping will allow you to probe the schematic nets and terminals easily and use the same expressions regardless of whether your design under test is a schematic or a DSPF file.

This mapping will also help with other new post-layout features outlined below.

The details of this mapping flow are explained in the ADE Assembler User Guide.

Sweeping DSPF Files Across Corners

If you want to use different DSPF files in different corners, you can simply write a .scs file that contains the paths to the DSPF files and sections. Add this .scs file as a model file to the Corners Setup form, and select the sections. You can then run simulation with different DSPF files in different corners.

Here is an example of the output signal plotted across the three corners.

You already have the ability to sweep DSPF views using config sweeps. To find out more about this feature, you can read my Sweeping Multiple DSPF Views in ADE blog.

Probing Terminal Voltage

Until now, when you selected a terminal in the schematic to add it to the ADE outputs, it would always save or plot the current on that terminal. There was no way to see from the GUI that the signal was current.

You would have to check the netlist to check what was being saved. For example, in Spectre currents are saved with a colon delimiter, :s and voltages with a period delimiter, .s .

Now, it is possible to select a terminal and choose whether a terminal voltage or current should be saved or plotted. When you add an output to ADE and select the terminal on the schematic, you can choose to save the voltage, current or both.

The schematic will also indicate what type of signal has been selected to plot or save by adding an ellipse around a terminal if you are plotting or saving terminal current, a V if you are plotting or saving terminal voltage, or both if you are plotting or saving both.

The signal will be added to the ADE outputs, the names will add an _V or _I suffix and the Type column will be updated to signal (V) or signal (I) - having these suffixes and types mean that you can use the filters to quickly find relevant signals.

Plotting to the ADE waveform window will show the current and voltages on the terminals.

Related Resources

• Blog
  • Sweeping Multiple DSPF Views 
• User Guide
  • DSPF File Mapping and Corner Sweeps
  • Terminal Voltage Probing

For more information on Cadence circuit design products and services, visit www.cadence.com.

About Virtuosity

Virtuosity has been our most viewed and admired blog series for a long time that has brought to fore some lesser known, yet very useful software and documentation improvements, and also shed light on some exciting new offerings in Virtuoso. We are now expanding the scope of this series by broadcasting the voice of different bloggers and experts, who would continue to preserve the legacy of Virtuosity, and try to give new dimensions to it by covering topics across the length and breadth of Virtuoso, and a lot more… Click Subscribe to visit the Subscription box at the top of the page in which you can submit your email address to receive notifications about our latest Virtuosity posts. Happy Reading!

Arja Hunkin