Virtuosity: The Debut of the Virtuoso EMIR Analysis Flow for DSPF

Hello, dear readers!

Continually improving the productivity of design engineers is central to the strategy followed by Cadence and has led to a variety of innovations and improved features across our products. Cadence has also actively focused on ways to enable design engineers to leverage and reuse solutions within its different products, thereby streamlining the design flow as much as possible. Recently, Cadence continued these efforts by amalgamating and enhancing multiple products to introduce the ‘Virtuoso EMIR analysis flow for DSPF’ for analog signoff EMIR. Splendid news, isn’t it? Read on to know more…

Introduced in IC6.1.8/ICADVM20.1 ISR15, the Virtuoso EMIR analysis flow for a Detailed Standard Parasitic Format (DSPF) file has been designed for analog and RF engineers who are interested in performing EMIR analysis while staying wholly within the Virtuoso environment. As we mentioned earlier, the flow consists of multiple products:

• Virtuoso Layout Suite
• Quantus Extraction Solution
• Virtuoso ADE Explorer (or Virtuoso ADE Assembler)
• Spectre Multi-Mode Simulation
• Voltus-Fi Custom Power Integrity Solution XL

Some key benefits of the flow include:

• The dedicated analog EMIR extraction UI of Quantus Extraction Solution helps you achieve the ‘accurate’ extraction, regardless of foundry process and node, thereby ensuring correct extraction data specifically for your design before running postlayout simulation with a Spectre simulator. 
  
  
• The enhanced interface of Virtuoso ADE Explorer and Virtuoso ADE Assembler simplifies the EMIR setup, while including features needed for advanced node analyses, thus letting you complete your setup entirely within the Virtuoso framework.

There are many anecdotal accounts from our users that illustrate the effectiveness of this flow in improving your productivity at work. To quote a few:

“This new flow provides the same-day setup as opposed to the earlier four-day manual setup and debug”.

“It provides more visibility to the layout reliability issues”.

“It adds more confidence for circuit reliability while staying within the familiar Virtuoso environment”.

And the list goes on... 

Know the Flow

Let us now show you what the Virtuoso EMIR analysis flow for a DSPF file is all about and how it works. In this flow, you can run EMIR analysis with a DSPF file through the Virtuoso interface. You can use this flow to analyze electromigration, voltage drop, and self-heating effects even in advanced process nodes. The flow comprises three steps:

1. The DSPF file is generated using the Quantus Extraction Solution product.
2. EMIR and advanced analyses are set up in Virtuoso ADE Explorer or Virtuoso ADE Assembler, and the simulation is run using a Spectre simulator.
3. The EMIR analysis results are reviewed in Voltus-Fi Custom Power Integrity Solution XL and on the layout using Virtuoso Layout Suite.

Now that you are familiar with the flow, we suggest you try it with your design and let us know your feedback.

 To understand how to run each step of the flow, refer to the Virtuoso EMIR Flow for DSPF RAK available on the Cadence Support portal.

Happy reading, and stay safe!

- Travis Tiedge, Harsha Hakkal, and Pallabi Roy 

Related Resources

For more information on Cadence circuit design products and services, visit www.cadence.com.

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